On Mon, Jan 02, 2017 at 05:00:58PM +0530, vathsala nagaraju wrote: > As per edp1.4 spec , alpm is required for psr2 operation as it's > used for all psr2 main link power down management and alpm enable > bit must be set for psr2 operation. > > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > Cc: Jim Bride <jim.bride@xxxxxxxxxxxxxxx> > Signed-off-by: vathsala nagaraju <vathsala.nagaraju@xxxxxxxxx> > Signed-off-by: Patil Deepti <deepti.patil@xxxxxxxxx> Reviewed-by: Jim Bride <jim.bride@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/intel_dp.c | 10 ++++++++++ > drivers/gpu/drm/i915/intel_psr.c | 6 +++++- > 3 files changed, 16 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 36dc835..0742b81 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1166,6 +1166,7 @@ struct i915_psr { > bool link_standby; > bool y_cord_support; > bool colorimetry_support; > + bool alpm; > }; > > enum intel_pch { > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index da577c9..9b313a3 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -3060,6 +3060,14 @@ static bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp) > return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED; > } > > +bool intel_dp_get_alpm_status(struct intel_dp *intel_dp) > +{ > + uint8_t alpm_caps = 0; > + > + drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP, &alpm_caps); > + return alpm_caps & DP_ALPM_CAP; > +} > + > /* These are source-specific values. */ > uint8_t > intel_dp_voltage_max(struct intel_dp *intel_dp) > @@ -3644,6 +3652,8 @@ void intel_dp_set_idle_link_train(struct intel_dp *intel_dp) > intel_dp_get_y_cord_status(intel_dp); > dev_priv->psr.colorimetry_support = > intel_dp_get_colorimetry_status(intel_dp); > + dev_priv->psr.alpm = > + intel_dp_get_alpm_status(intel_dp); > } > > } > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c > index 93eb0f0..494e4b2 100644 > --- a/drivers/gpu/drm/i915/intel_psr.c > +++ b/drivers/gpu/drm/i915/intel_psr.c > @@ -209,7 +209,11 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp) > drm_dp_dpcd_writeb(&intel_dp->aux, > DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF, > DP_AUX_FRAME_SYNC_ENABLE); > - > + /* Enable ALPM at sink for psr2 */ > + if (dev_priv->psr.psr2_support && dev_priv->psr.alpm) > + drm_dp_dpcd_writeb(&intel_dp->aux, > + DP_RECEIVER_ALPM_CONFIG, > + DP_ALPM_ENABLE); > if (dev_priv->psr.link_standby) > drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, > DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE); > -- > 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx