From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Based on empirical evidence the display engine (at least) always
treats Yf tiles as 128Bx32. Currently we're assuming the tile dimensions
change based on the pixel format. Let's adjust our code to match the
hardware.
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/intel_display.c | 20 ++++++--------------
1 file changed, 6 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index bc398743e941..0ca0dbccc005 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2070,20 +2070,12 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int plane)
else
return 512;
case I915_FORMAT_MOD_Yf_TILED:
- switch (cpp) {
- case 1:
- return 64;
- case 2:
- case 4:
- return 128;
- case 8:
- case 16:
- return 256;
- default:
- MISSING_CASE(cpp);
- return cpp;
- }
- break;
+ /*
+ * Bspec seems to suggest that the Yf tile width would
+ * depend on the cpp. In reality it doesn't, at least
+ * as far as the display engine is concerned.
+ */
+ return 128;
default:
MISSING_CASE(fb->modifier);
return cpp;
--
2.10.2
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