> Subject: Re: Updated drm-intel-testing > > On Mon, Dec 05, 2016 at 09:40:25AM +0100, Daniel Vetter wrote: > > Hi all, > > > > New -testing cycle with cool stuff: > > First round of stuff for 4.10! > > ofc this should have been 4.11 ... > -Daniel Thanks Daniel! with Julian we are refining current QA process to have some acceptance criteria in place to accept a version (ie commit id/HEAD) before tagging as testing or QA tag and then proceeding in further validation cycle for the rest of the week. Cheers, Yann > > > > > - refactor hangcheck/ban/reset stats code in prep for TDR (Mika) > > - much more fancy perf monitoring support (Robert Bragg) > > - lspcon fixes (Imre) > > - rework plane ids to unconfuse the code (Ville) > > - fix up cdclck/atomic state handling (Ville) > > - debugobjects support for i915 fences (Chris) > > - guc code cleanup (Arkadiusz Hiler) > > - dp mst enabling, one more attempt (Libin) > > - bugfixes for request resubmission after hangs (Chris) > > - add basic geminilake support (Ander) > > - switch more internal functions from drm_device to dev_priv (Tvrtko) > > > > Happy testing! > > > > Cheers, Daniel > > > > -- > > Daniel Vetter > > Software Engineer, Intel Corporation > > http://blog.ffwll.ch > > -- > Daniel Vetter > Software Engineer, Intel Corporation > http://blog.ffwll.ch > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
