We do take execlist spinlock on thread context when
we declare gpu to be wedged. Avoid the need to change
the spinlock type just for the sake of wedging by
removing the spinlock. Keep irqs disabled during reset
phase and only enable on success path. Also add explicit
disable to setting wedged so that we leave irqs off
if we fail init.
Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx>
---
drivers/gpu/drm/i915/i915_drv.c | 20 ++------------------
drivers/gpu/drm/i915/i915_drv.h | 18 ++++++++++++++++++
drivers/gpu/drm/i915/i915_gem.c | 6 ++++--
3 files changed, 24 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 0213a30..2ed81f1 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1725,22 +1725,6 @@ int i915_resume_switcheroo(struct drm_device *dev)
return i915_drm_resume(dev);
}
-static void disable_engines_irq(struct drm_i915_private *dev_priv)
-{
- struct intel_engine_cs *engine;
- enum intel_engine_id id;
-
- /* Ensure irq handler finishes, and not run again. */
- disable_irq(dev_priv->drm.irq);
- for_each_engine(engine, dev_priv, id)
- tasklet_kill(&engine->irq_tasklet);
-}
-
-static void enable_engines_irq(struct drm_i915_private *dev_priv)
-{
- enable_irq(dev_priv->drm.irq);
-}
-
/**
* i915_reset - reset chip after a hang
* @dev: drm device to reset
@@ -1775,9 +1759,8 @@ void i915_reset(struct drm_i915_private *dev_priv)
pr_notice("drm/i915: Resetting chip after gpu hang\n");
- disable_engines_irq(dev_priv);
+ i915_disable_engine_irqs(dev_priv);
ret = intel_gpu_reset(dev_priv, ALL_ENGINES);
- enable_engines_irq(dev_priv);
if (ret) {
if (ret != -ENODEV)
@@ -1812,6 +1795,7 @@ void i915_reset(struct drm_i915_private *dev_priv)
wakeup:
wake_up_bit(&error->flags, I915_RESET_IN_PROGRESS);
+ i915_enable_engine_irqs(dev_priv);
return;
error:
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4735b417..76ca14c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -4147,6 +4147,24 @@ __i915_request_irq_complete(struct drm_i915_gem_request *req)
return false;
}
+static inline void
+i915_disable_engine_irqs(struct drm_i915_private *dev_priv)
+{
+ struct intel_engine_cs *engine;
+ enum intel_engine_id id;
+
+ /* Ensure irq handler finishes, and not run again. */
+ disable_irq(dev_priv->drm.irq);
+ for_each_engine(engine, dev_priv, id)
+ tasklet_kill(&engine->irq_tasklet);
+}
+
+static inline void
+i915_enable_engine_irqs(struct drm_i915_private *dev_priv)
+{
+ enable_irq(dev_priv->drm.irq);
+}
+
void i915_memcpy_init_early(struct drm_i915_private *dev_priv);
bool i915_memcpy_from_wc(void *dst, const void *src, unsigned long len);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 490fd30..51bf03b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2689,12 +2689,11 @@ static void i915_gem_cleanup_engine(struct intel_engine_cs *engine)
*/
if (i915.enable_execlists) {
- spin_lock(&engine->execlist_lock);
+ /* Irqs are disabled so no need to get lock */
INIT_LIST_HEAD(&engine->execlist_queue);
i915_gem_request_put(engine->execlist_port[0].request);
i915_gem_request_put(engine->execlist_port[1].request);
memset(engine->execlist_port, 0, sizeof(engine->execlist_port));
- spin_unlock(&engine->execlist_lock);
}
}
@@ -2704,6 +2703,9 @@ void i915_gem_set_wedged(struct drm_i915_private *dev_priv)
enum intel_engine_id id;
lockdep_assert_held(&dev_priv->drm.struct_mutex);
+
+ i915_disable_engine_irqs(dev_priv);
+
set_bit(I915_WEDGED, &dev_priv->gpu_error.flags);
i915_gem_context_lost(dev_priv);
--
2.7.4
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