On Wed, Aug 24, 2016 at 08:20:31AM +0100, Chris Wilson wrote:
> When determining the initial plane config we set the same information in
> both the framebuffer (fb.modifier[0]) and in plane_config.tiling.
> Ultimately, we only need the information in the framebuffer so remove
> the redundant copy from plane_config.tiling
>
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_display.c | 23 +++++++----------------
> drivers/gpu/drm/i915/intel_drv.h | 1 -
> 2 files changed, 7 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index d61c264d5a37..e363a68d97ed 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2700,7 +2700,7 @@ intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
> return false;
> }
>
> - if (plane_config->tiling == I915_TILING_X)
> + if (fb->modifier[0] == I915_FORMAT_MOD_X_TILED)
> obj->tiling_and_stride = fb->pitches[0] | I915_TILING_X;
>
> mode_cmd.pixel_format = fb->pixel_format;
> @@ -8730,12 +8730,8 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
>
> fb = &intel_fb->base;
>
> - if (INTEL_INFO(dev)->gen >= 4) {
> - if (val & DISPPLANE_TILED) {
> - plane_config->tiling = I915_TILING_X;
> - fb->modifier[0] = I915_FORMAT_MOD_X_TILED;
> - }
> - }
> + if (INTEL_GEN(dev) >= 4 && val & DISPPLANE_TILED)
> + fb->modifier[0] = I915_FORMAT_MOD_X_TILED;
dev_priv
>
> pixel_format = val & DISPPLANE_PIXFORMAT_MASK;
> fourcc = i9xx_format_to_fourcc(pixel_format);
> @@ -8743,7 +8739,7 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
> fb->bits_per_pixel = drm_format_plane_cpp(fourcc, 0) * 8;
>
> if (INTEL_INFO(dev)->gen >= 4) {
> - if (plane_config->tiling)
> + if (fb->modifier[0] == I915_FORMAT_MOD_X_TILED)
> offset = I915_READ(DSPTILEOFF(plane));
> else
> offset = I915_READ(DSPLINOFF(plane));
> @@ -9756,7 +9752,6 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
> fb->modifier[0] = DRM_FORMAT_MOD_NONE;
> break;
> case PLANE_CTL_TILED_X:
> - plane_config->tiling = I915_TILING_X;
> fb->modifier[0] = I915_FORMAT_MOD_X_TILED;
> break;
> case PLANE_CTL_TILED_Y:
> @@ -9851,12 +9846,8 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
>
> fb = &intel_fb->base;
>
> - if (INTEL_INFO(dev)->gen >= 4) {
> - if (val & DISPPLANE_TILED) {
> - plane_config->tiling = I915_TILING_X;
> - fb->modifier[0] = I915_FORMAT_MOD_X_TILED;
> - }
> - }
> + if (INTEL_GEN(dev) >= 4 && val & DISPPLANE_TILED)
> + fb->modifier[0] = I915_FORMAT_MOD_X_TILED;
dev_priv
>
> pixel_format = val & DISPPLANE_PIXFORMAT_MASK;
> fourcc = i9xx_format_to_fourcc(pixel_format);
> @@ -9867,7 +9858,7 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
> if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
> offset = I915_READ(DSPOFFSET(pipe));
> } else {
> - if (plane_config->tiling)
> + if (fb->modifier[0] == I915_FORMAT_MOD_X_TILED)
> offset = I915_READ(DSPTILEOFF(pipe));
> else
> offset = I915_READ(DSPLINOFF(pipe));
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 37cad7c779b3..3ee156aab938 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -400,7 +400,6 @@ struct intel_plane_state {
>
> struct intel_initial_plane_config {
> struct intel_framebuffer *fb;
> - unsigned int tiling;
> int size;
> u32 base;
> };
Kind regards, David
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