Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes:
> After we update one PTE for a page, the caller expects to be able to
> immediately use that through a GGTT read/write. To comply with the
> callers expectations we therefore need to flush the chipset buffers
> before returning.
>
> Reported-by: Matti Hämäläinen <ccr@xxxxxxxx>
> Fixes: d6473f566417 ("drm/i915: Add support for mapping an object page...")
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx>
> Cc: Ankitprasad Sharma <ankitprasad.r.sharma@xxxxxxxxx>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
> Tested-by: Matti Hämäläinen <ccr@xxxxxxxx>
> Cc: drm-intel-fixes@xxxxxxxxxxxxxxxxxxxxx
> ---
> drivers/char/agp/intel-gtt.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
> index 44311296ec02..0f7d28a98b9a 100644
> --- a/drivers/char/agp/intel-gtt.c
> +++ b/drivers/char/agp/intel-gtt.c
> @@ -845,6 +845,8 @@ void intel_gtt_insert_page(dma_addr_t addr,
> unsigned int flags)
> {
> intel_private.driver->write_entry(addr, pg, flags);
> + if (intel_private.driver->chipset_flush)
> + intel_private.driver->chipset_flush();
> }
> EXPORT_SYMBOL(intel_gtt_insert_page);
>
> --
> 2.9.3
>
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