On Tue, Aug 09, 2016 at 05:04:11PM +0200, Maarten Lankhorst wrote:
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
Reviewed-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_lvds.c | 22 ++++++++++------------
> 1 file changed, 10 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
> index bfeec045579e..f5747a901ecc 100644
> --- a/drivers/gpu/drm/i915/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/intel_lvds.c
> @@ -141,17 +141,16 @@ static void intel_pre_enable_lvds(struct intel_encoder *encoder,
> struct drm_connector_state *conn_state)
> {
> struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
> - struct drm_device *dev = encoder->base.dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> - struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
> - const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> + struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
> + const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
> int pipe = crtc->pipe;
> u32 temp;
>
> - if (HAS_PCH_SPLIT(dev)) {
> + if (HAS_PCH_SPLIT(dev_priv)) {
> assert_fdi_rx_pll_disabled(dev_priv, pipe);
> assert_shared_dpll_disabled(dev_priv,
> - crtc->config->shared_dpll);
> + pipe_config->shared_dpll);
> } else {
> assert_pll_disabled(dev_priv, pipe);
> }
> @@ -159,7 +158,7 @@ static void intel_pre_enable_lvds(struct intel_encoder *encoder,
> temp = I915_READ(lvds_encoder->reg);
> temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
>
> - if (HAS_PCH_CPT(dev)) {
> + if (HAS_PCH_CPT(dev_priv)) {
> temp &= ~PORT_TRANS_SEL_MASK;
> temp |= PORT_TRANS_SEL_CPT(pipe);
> } else {
> @@ -172,7 +171,7 @@ static void intel_pre_enable_lvds(struct intel_encoder *encoder,
>
> /* set the corresponsding LVDS_BORDER bit */
> temp &= ~LVDS_BORDER_ENABLE;
> - temp |= crtc->config->gmch_pfit.lvds_border_bits;
> + temp |= pipe_config->gmch_pfit.lvds_border_bits;
> /* Set the B0-B3 data pairs corresponding to whether we're going to
> * set the DPLLs for dual-channel mode or not.
> */
> @@ -195,7 +194,7 @@ static void intel_pre_enable_lvds(struct intel_encoder *encoder,
> if (IS_GEN4(dev_priv)) {
> /* Bspec wording suggests that LVDS port dithering only exists
> * for 18bpp panels. */
> - if (crtc->config->dither && crtc->config->pipe_bpp == 18)
> + if (pipe_config->dither && pipe_config->pipe_bpp == 18)
> temp |= LVDS_ENABLE_DITHER;
> else
> temp &= ~LVDS_ENABLE_DITHER;
> @@ -245,12 +244,11 @@ static void intel_disable_lvds(struct intel_encoder *encoder,
> struct intel_crtc_state *old_crtc_state,
> struct drm_connector_state *old_conn_state)
> {
> - struct drm_device *dev = encoder->base.dev;
> struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> i915_reg_t ctl_reg, stat_reg;
>
> - if (HAS_PCH_SPLIT(dev)) {
> + if (HAS_PCH_SPLIT(dev_priv)) {
> ctl_reg = PCH_PP_CONTROL;
> stat_reg = PCH_PP_STATUS;
> } else {
> --
> 2.7.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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