On Wed, Aug 17, 2016 at 04:41:44PM -0300, Paulo Zanoni wrote: > From: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > intel_fbc_pre_update() depends upon the new state being already pinned > in place in the Global GTT (primarily for both fencing which wants both > an offset and a fence register, if assigned). This requires the call to > intel_fbc_pre_update() be after intel_pin_and_fence_fb() - but commit > e8216e502aca ("drm/i915/fbc: call intel_fbc_pre_update earlier during > page flips") moved the code way too much up in its attempt to call it > before the page flip. > > v2 (from Paulo): > - Point the original bad commit. > - Add a comment to maybe prevent further regressions. > > Fixes: e8216e502aca ("drm/i915/fbc: call intel_fbc_pre_update earlier...") > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > Cc: Daniel Vetter <daniel.vetter@xxxxxxxxx> > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > Cc: Patrik Jakobsson <patrik.jakobsson@xxxxxxxxxxxxxxx> > Cc: drm-intel-fixes@xxxxxxxxxxxxxxxxxxxxx If you had just claimed this as your own, I could have reviewed it ;) -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx