On Fri, 5 Aug 2016 15:23:23 -0700 "Xiong, James" <james.xiong@xxxxxxxxx> wrote: > Reviewed-by James Xiong <james.xiong@xxxxxxxxx> Merged to gold. Thanks for the review. Bob > > -----Original Message----- > From: isg-gms-request@xxxxxxxxxxxxxxxxx [mailto:isg-gms-request@xxxxxxxxxxxxxxxxx] On Behalf Of Paauwe, Bob J > Sent: Thursday, August 4, 2016 11:16 AM > To: isg-gms <isg-gms@xxxxxxxxxxxxxxxxx>; intel-gfx <intel-gfx@xxxxxxxxxxxxxxxxxxxxx> > Cc: Paauwe, Bob J <bob.j.paauwe@xxxxxxxxx> > Subject: [isg-gms] [PATCH] drm/i915/bxt: Bring MIPI out of reset > > and power up the DSI regulator when initializing a MIPI display. > > Signed-off-by: Bob Paauwe <bob.j.paauwe@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++ drivers/gpu/drm/i915/intel_dsi.c | 13 +++++++++++++ > 2 files changed, 21 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 6607aaf..da29d74 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -1262,11 +1262,19 @@ enum skl_disp_power_wells { #define CHV_TX_DW14(ch, lane) _TXLANE(ch, lane, 0xb8) > #define DPIO_UPAR_SHIFT 30 > > +/* BXT DSI Regulator registers */ > +#define BXT_DSI_CFG _MMIO(0x160020) > +#define STRAP_SELECT (1 << 0) > + > +#define BXT_DSI_TXCNTRL _MMIO(0x160054) > +#define HS_IO_CONTROL_SELECT 0x0 > + > /* BXT PHY registers */ > #define _BXT_PHY(phy, a, b) _MMIO_PIPE((phy), (a), (b)) > > #define BXT_P_CR_GT_DISP_PWRON _MMIO(0x138090) > #define GT_DISPLAY_POWER_ON(phy) (1 << (phy)) > +#define MIPIO_RST_CTRL (1 << 2) > > #define _PHY_CTL_FAMILY_EDP 0x64C80 > #define _PHY_CTL_FAMILY_DDI 0x64C90 > diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c > index b2d2cba..c2aa9e1 100644 > --- a/drivers/gpu/drm/i915/intel_dsi.c > +++ b/drivers/gpu/drm/i915/intel_dsi.c > @@ -549,6 +549,19 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder) > I915_WRITE(DSPCLK_GATE_D, tmp); > } > > + if (IS_BROXTON(dev)) { > + /* > + * Bring the MIPI IO out of reset and power up > + * the DSI regulator. > + */ > + tmp = I915_READ(BXT_P_CR_GT_DISP_PWRON); > + tmp |= MIPIO_RST_CTRL; > + I915_WRITE(BXT_P_CR_GT_DISP_PWRON, tmp); > + > + I915_WRITE(BXT_DSI_CFG, STRAP_SELECT); > + I915_WRITE(BXT_DSI_TXCNTRL, HS_IO_CONTROL_SELECT); > + } > + > /* put device in ready state */ > intel_dsi_device_ready(encoder); > > -- > 2.7.4 > > ------------------------------------- > isg-gms@xxxxxxxxxxxxxxxxx > https://eclists.intel.com/sympa/info/isg-gms > Unsubscribe by sending email to sympa@xxxxxxxxxxxxxxxxx with subject "Unsubscribe isg-gms" -- -- Bob Paauwe Bob.J.Paauwe@xxxxxxxxx IOTG / PED Software Organization Intel Corp. Folsom, CA (916) 356-6193 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
