On Wed, Aug 03, 2016 at 05:16:42PM +0100, Chris Wilson wrote: > Erratum SKL075: Display Flicker May Occur When Both VT-d And FBC Are Enabled > > "Display flickering may occur when both FBC (Frame Buffer Compression) > and VT - d (Intel® Virtualization Technology for Directed I/O) are enabled > and in use by the display controller." > > Ville found the w/a name in the database: > WaFbcTurnOffFbcWhenHyperVisorIsUsed:skl > > v2: Log when the quirk is applied. > v3: Ensure i915.enable_fbc is false when !HAS_FBC() > v4: Fix function name after rebase > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_fbc.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c > index 8147eb9e8475..b673c7c54a46 100644 > --- a/drivers/gpu/drm/i915/intel_fbc.c > +++ b/drivers/gpu/drm/i915/intel_fbc.c > @@ -1229,12 +1229,28 @@ static int intel_sanitize_fbc_option(struct drm_i915_private *dev_priv) > if (i915.enable_fbc >= 0) > return !!i915.enable_fbc; > > + if (!HAS_FBC(dev_priv)) > + return 0; > + > if (IS_BROADWELL(dev_priv)) > return 1; > > return 0; > } > > +static bool need_fbc_wa(struct drm_i915_private *dev_priv) need_fbc_vtd_wa() perhaps? > +{ > +#ifdef CONFIG_INTEL_IOMMU > + /* WaFbcTurnOffFbcWhenHyperVisorIsUsed:skl */ > + if (intel_iommu_gfx_mapped && IS_SKYLAKE(dev_priv)) { BXT needs this as well AFAICS. with that added Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > + DRM_INFO("Disabling framebuffer compression (FBC) to prevent screen flicker with VT-d enabled\n"); > + return true; > + } > +#endif > + > + return false; > +} > + > /** > * intel_fbc_init - Initialize FBC > * @dev_priv: the i915 device > @@ -1252,6 +1268,9 @@ void intel_fbc_init(struct drm_i915_private *dev_priv) > fbc->active = false; > fbc->work.scheduled = false; > > + if (need_fbc_wa(dev_priv)) > + mkwrite_device_info(dev_priv)->has_fbc = false; > + > i915.enable_fbc = intel_sanitize_fbc_option(dev_priv); > DRM_DEBUG_KMS("Sanitized enable_fbc value: %d\n", i915.enable_fbc); > > -- > 2.8.1 -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx