On 04.08.2016 06:33, Rodrigo Vivi wrote: > For now DC is only helping on screen off scenarios since PSR is disabled. > > But if we want to enable PSR first we need to make DC reliable with screen on. > Biggest challenge is to deal with vblank counters since frame counter register > is read only and can be reset in DC state. > > This series is one of possible approaches, but brings the down side of not > being possible to use runtime pm with vblank enabled. Some test cases needs > to be adapted to represent this new vision. Note that the frame counter register must not reset before drm_crtc_vblank_off / after drm_crtc_vblank_on, even while the vblank interrupt is disabled. Otherwise the DRM vblank counter as seen by userspace via the DRM_IOCTL_WAIT_VBLANK ioctl will jump around, because the core DRM code uses the frame counter register to keep track of how many vertical blank periods occurred since the interrupt was disabled. > But also this series is not fully tested. Apparently I have an issue yet > with flip-vs-expired-vblank_* tests and pm_rpm basic tests. Maybe some of the test failures are due to the above. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
