Re: [PATCH 1/2] drm/i915: Clear per-engine fault register as early as possible

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On 28/07/16 11:12, Joonas Lahtinen wrote:
On ke, 2016-07-27 at 19:11 +0100, Chris Wilson wrote:
From gen6, the hardware tracks address lookup failures and so that we do
not trigger false positives from errors before we are initialised we
clear those upon startup (intel_uncore_early_sanitize()). However, this
is actually before we have the engines defined and this turns out to be
a nop. The earliest we can do so is inside intel_engine_setup().

Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx>
Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxxxxxxxx>

Documentation I found on this was poor, so I'd prefer a Tested-by: tag
from somebody (wide platform coverage). But codewise it's consistent
with existing usage.

Reviewed-by: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx>

AFAICT from the BSpec, only IVB-HSW have this scheme (there are at most four such registers 0x4[0-3]94, with 0x4494 being something different).

Thereafter (BDW+) there's just ONE fault register (0x4094) replacing all the separate ones, with a field showing which engine the rest of the content relates to.

So pretty much all code using this definition will be wrong on GEN8+; it will access undefined or nonexistent registers :-(

.Dave.
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