On pe, 2016-07-22 at 10:14 +0100, Chris Wilson wrote: > static int > -gen8_ring_sync(struct drm_i915_gem_request *wait, > - struct drm_i915_gem_request *signal) > +gen8_ring_sync_to(struct drm_i915_gem_request *req, > + struct drm_i915_gem_request *signal) > { > - struct intel_ring *waiter = wait->ring; > - struct drm_i915_private *dev_priv = wait->i915; > - u64 offset = GEN8_WAIT_OFFSET(wait->engine, signal->engine->id); > + struct intel_ring *ring = req->ring; > + struct drm_i915_private *dev_priv = req->i915; > + u64 offset = GEN8_WAIT_OFFSET(req->engine, signal->engine->id); > struct i915_hw_ppgtt *ppgtt; > int ret; > > - ret = intel_ring_begin(wait, 4); > + ret = intel_ring_begin(req, 4); > if (ret) > return ret; > > - intel_ring_emit(waiter, MI_SEMAPHORE_WAIT | > - MI_SEMAPHORE_GLOBAL_GTT | > - MI_SEMAPHORE_SAD_GTE_SDD); > - intel_ring_emit(waiter, signal->fence.seqno); > - intel_ring_emit(waiter, lower_32_bits(offset)); > - intel_ring_emit(waiter, upper_32_bits(offset)); > - intel_ring_advance(waiter); > + intel_ring_emit(ring, > + MI_SEMAPHORE_WAIT | > + MI_SEMAPHORE_GLOBAL_GTT | > + MI_SEMAPHORE_SAD_GTE_SDD); > + intel_ring_emit(ring, signal->fence.seqno); > + intel_ring_emit(ring, lower_32_bits(offset)); > + intel_ring_emit(ring, upper_32_bits(offset)); > + intel_ring_advance(ring); > > /* When the !RCS engines idle waiting upon a semaphore, they lose their > * pagetables and we must reload them before executing the batch. > * We do this on the i915_switch_context() following the wait and > * before the dispatch. > */ > - ppgtt = wait->ctx->ppgtt; > - if (ppgtt && wait->engine->id != RCS) > - ppgtt->pd_dirty_rings |= intel_engine_flag(wait->engine); > + ppgtt = req->ctx->ppgtt; This assignment could still be lifted up. Reviewed-by: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> > + if (ppgtt && req->engine->id != RCS) > + ppgtt->pd_dirty_rings |= intel_engine_flag(req->engine); > return 0; > } > -- Joonas Lahtinen Open Source Technology Center Intel Corporation _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx