On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@xxxxxxxxx> wrote:
> Moving all GPU features to the platform struct definition allows for
> - standard place when adding new features from new platforms
> - possible to see supported features when dumping struct
> definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 3 ++-
> drivers/gpu/drm/i915/i915_pci.c | 5 +++++
> 2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a326a88..75131a0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -775,6 +775,7 @@ struct intel_csr {
> func(has_guc) sep \
> func(has_guc_ucode) sep \
> func(has_guc_sched) sep \
> + func(has_rc6) sep \
> func(has_resource_streamer) sep \
> func(has_pipe_cxsr) sep \
> func(has_hotplug) sep \
> @@ -2856,7 +2857,7 @@ struct drm_i915_cmd_table {
> #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
> #define HAS_PSR(dev) (INTEL_INFO(dev)->has_psr)
> #define HAS_RUNTIME_PM(dev) (INTEL_INFO(dev)->has_runtime_pm)
> -#define HAS_RC6(dev) (INTEL_INFO(dev)->gen >= 6)
> +#define HAS_RC6(dev) (INTEL_INFO(dev)->has_rc6)
> #define HAS_RC6p(dev) (IS_GEN6(dev) || IS_IVYBRIDGE(dev))
>
> #define HAS_CSR(dev) (INTEL_INFO(dev)->has_csr)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index f59ad4b..e10fb5c 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -200,6 +200,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
> .has_fbc = 1, \
> .has_runtime_pm = 1, \
> .has_core_ring_freq = 1, \
> + .has_rc6 = 1, \
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> .has_llc = 1, \
> GEN_DEFAULT_PIPEOFFSETS, \
> @@ -219,6 +220,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
> .need_gfx_hws = 1, .has_hotplug = 1, \
> .has_fbc = 1, \
> .has_core_ring_freq = 1, \
> + .has_rc6 = 1, \
another case where the GEN7 features based on GEN6 needs to come first.
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> .has_llc = 1, \
> GEN_DEFAULT_PIPEOFFSETS, \
> @@ -245,6 +247,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
> .gen = 7, .num_pipes = 2, \
> .has_psr = 1, \
> .has_runtime_pm = 1, \
> + .has_rc6 = 1, \
> .need_gfx_hws = 1, .has_hotplug = 1, \
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> .display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -320,6 +323,7 @@ static const struct intel_device_info intel_cherryview_info = {
> .has_psr = 1,
> .has_runtime_pm = 1,
> .has_resource_streamer = 1,
> + .has_rc6 = 1,
> .display_mmio_offset = VLV_DISPLAY_BASE,
> GEN_CHV_PIPEOFFSETS,
> CURSOR_OFFSETS,
> @@ -358,6 +362,7 @@ static const struct intel_device_info intel_broxton_info = {
> .has_runtime_pm = 1,
> .has_pooled_eu = 0,
> .has_resource_streamer = 1,
> + .has_rc6 = 1,
> GEN_DEFAULT_PIPEOFFSETS,
> IVB_CURSOR_OFFSETS,
> BDW_COLORS,
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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