Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > A foreign dma-buf does not share our cache domain tracking, and we rely > on the producer ensuring cache coherency. Marking them as being in the > CPU domain is incorrect. > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_gem_dmabuf.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c > index 80bbe43a2e92..c7d734248ed0 100644 > --- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c > +++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c > @@ -299,6 +299,8 @@ struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev, > drm_gem_private_object_init(dev, &obj->base, dma_buf->size); > i915_gem_object_init(obj, &i915_gem_object_dmabuf_ops); > obj->base.import_attach = attach; > + obj->base.read_domains = I915_GEM_DOMAIN_GTT; I was a confused about the coherency guarantees of this _GTT. But after chatting with Chris I am convinced that what comes to coherency for other guests and sharing, this is it. Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> -Mika > + obj->base.write_domain = 0; > > return &obj->base; > > -- > 2.8.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
