On Fri, Jul 15, 2016 at 01:41:33PM +0300, Mika Kuoppala wrote: > Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > > > Before suspend, and especially before building the hibernation image, we > > need to context image to be coherent in memory. To do this we require > > that we perform a context switch to a disposable context (i.e. the > > dev_priv->kernel_context) - when that switch is complete, all other > > context images will be complete. This leaves the kernel_context image as > > incomplete, but fortunately that is disposable and we can do a quick > > fixup of the logical state after resuming. > > > > Testcase: igt/gem_exec_suspend # bsw > > References: https://bugs.freedesktop.org/show_bug.cgi?id=96526 > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > --- > > drivers/gpu/drm/i915/i915_drv.c | 4 +--- > > drivers/gpu/drm/i915/i915_drv.h | 1 + > > drivers/gpu/drm/i915/i915_gem.c | 46 +++++++++++++++++++++++++++++++++++++++++ > > 3 files changed, 48 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > > index 15440123e38d..c5b7b8e0678a 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.c > > +++ b/drivers/gpu/drm/i915/i915_drv.c > > @@ -1590,9 +1590,7 @@ static int i915_drm_resume(struct drm_device *dev) > > > > intel_csr_ucode_resume(dev_priv); > > > > - mutex_lock(&dev->struct_mutex); > > - i915_gem_restore_gtt_mappings(dev); > > - mutex_unlock(&dev->struct_mutex); > > + i915_gem_resume(dev); > > > > i915_restore_state(dev); > > intel_opregion_setup(dev_priv); > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > > index 1ec523d29789..e73c0fc84c73 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.h > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > @@ -3384,6 +3384,7 @@ void i915_gem_init_swizzling(struct drm_device *dev); > > void i915_gem_cleanup_engines(struct drm_device *dev); > > int __must_check i915_gem_wait_for_idle(struct drm_i915_private *dev_priv); > > int __must_check i915_gem_suspend(struct drm_device *dev); > > +void i915_gem_resume(struct drm_device *dev); > > void __i915_add_request(struct drm_i915_gem_request *req, > > struct drm_i915_gem_object *batch_obj, > > bool flush_caches); > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > > index cf0e8aa8035c..8b42a5101f11 100644 > > --- a/drivers/gpu/drm/i915/i915_gem.c > > +++ b/drivers/gpu/drm/i915/i915_gem.c > > @@ -4974,6 +4974,35 @@ i915_gem_stop_engines(struct drm_device *dev) > > dev_priv->gt.stop_engine(engine); > > } > > > > +static int switch_to_kernel_context(struct drm_i915_private *dev_priv) > > +{ > > + struct intel_engine_cs *engine; > > + > > + for_each_engine(engine, dev_priv) { > > + struct drm_i915_gem_request *req; > > + int ret; > > + > > + if (engine->last_context == NULL) > > + continue; > > + > > + if (engine->last_context == dev_priv->kernel_context) > > + continue; > > + > > + req = i915_gem_request_alloc(engine, dev_priv->kernel_context); > > + if (IS_ERR(req)) > > + return PTR_ERR(req); > > + > > + ret = 0; > > + if (!i915.enable_execlists) > > + ret = i915_switch_context(req); > > + i915_add_request_no_flush(req); > > + if (ret) > > + return ret; > > + } > > + > > + return 0; > > +} > > + > > Why do you want keep this separate? Altho the evict one is a little > bit different and as I didn't see any perf implications: Why not > consolidate the evict one and this one and have i915_gem_idle which > would park to default and wait for idle. I found i915_gem_idle() to be easily confused with the idle functions we call upon idling. And later on you will see that i915_gem_park() itself is not common to anything but suspend. So I don't feel like introducing that as nebulous concept. But with a functional change to evict noted, we can share the switch-context code... -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
