As gen6_emit_request() only differs from i9xx_emit_request() when semaphores are enabled, only use the specialised vfunc in that scenario. Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_ringbuffer.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 0f613239d044..dd5e13f0e7e9 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -1446,22 +1446,20 @@ static int i9xx_emit_request(struct drm_i915_gem_request *req) } /** - * gen6_emit_request - Update the semaphore mailbox registers + * gen6_sema_emit_request - Update the semaphore mailbox registers * * @request - request to write to the ring * * Update the mailbox registers in the *other* rings with the current seqno. * This acts like a signal in the canonical semaphore. */ -static int gen6_emit_request(struct drm_i915_gem_request *req) +static int gen6_sema_emit_request(struct drm_i915_gem_request *req) { - if (req->engine->semaphore.signal) { - int ret; + int ret; - ret = req->engine->semaphore.signal(req); - if (ret) - return ret; - } + ret = req->engine->semaphore.signal(req); + if (ret) + return ret; return i9xx_emit_request(req); } @@ -2700,6 +2698,8 @@ static void intel_ring_init_semaphores(struct drm_i915_private *dev_priv, if (!i915.semaphores) return; + engine->emit_request = gen6_sema_emit_request; + if (INTEL_GEN(dev_priv) >= 8) { u64 offset = i915_gem_obj_ggtt_offset(dev_priv->semaphore_obj); @@ -2800,8 +2800,6 @@ static void intel_ring_default_vfuncs(struct drm_i915_private *dev_priv, engine->init_hw = init_ring_common; engine->emit_request = i9xx_emit_request; - if (INTEL_GEN(dev_priv) >= 6) - engine->emit_request = gen6_emit_request; engine->submit_request = i9xx_submit_request; if (INTEL_GEN(dev_priv) >= 8) -- 2.8.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx