On Tue, Jul 05, 2016 at 12:59:25PM +0300, Mika Kuoppala wrote: > Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > > > These are identical, so let's just use the same vfunc. > > > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > --- > > drivers/gpu/drm/i915/i915_gem_gtt.c | 29 +++++------------------------ > > 1 file changed, 5 insertions(+), 24 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > > index 0bb18b88dc7a..fd249f5a82f0 100644 > > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > > @@ -1683,17 +1683,6 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt, > > return 0; > > } > > > > -static int vgpu_mm_switch(struct i915_hw_ppgtt *ppgtt, > > - struct drm_i915_gem_request *req) > > -{ > > - struct intel_engine_cs *engine = req->engine; > > - struct drm_i915_private *dev_priv = to_i915(ppgtt->base.dev); > > - > > - I915_WRITE(RING_PP_DIR_DCLV(engine), PP_DIR_DCLV_2G); > > - I915_WRITE(RING_PP_DIR_BASE(engine), get_pd_offset(ppgtt)); > > - return 0; > > -} > > - > > static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt, > > struct drm_i915_gem_request *req) > > { > > @@ -1731,15 +1720,10 @@ static int gen6_mm_switch(struct i915_hw_ppgtt *ppgtt, > > struct drm_i915_gem_request *req) > > { > > struct intel_engine_cs *engine = req->engine; > > - struct drm_device *dev = ppgtt->base.dev; > > - struct drm_i915_private *dev_priv = dev->dev_private; > > - > > + struct drm_i915_private *dev_priv = req->i915; > > > > I915_WRITE(RING_PP_DIR_DCLV(engine), PP_DIR_DCLV_2G); > > I915_WRITE(RING_PP_DIR_BASE(engine), get_pd_offset(ppgtt)); > > - > > - POSTING_READ(RING_PP_DIR_DCLV(engine)); > > - > > Why is the posting not needed anymore? It was never needed. Before the GPU can use these values (from a batch executed on the command stream) the register writes are flushed, and these are only ever used by the GPU. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx