Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > Acquiring the forcewake domain asserts that it is in an atomic section > (as we always expect to under the uncore.lock). This true expect for > initialising the domains on Ivybridge, and so we generate a warning. > Wrap the manual usage of fw_domains inside the spin_lock. > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_uncore.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > index 7da3906badf3..1d65209c0998 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -1299,9 +1299,11 @@ static void intel_uncore_fw_domains_init(struct drm_i915_private *dev_priv) > fw_domain_init(dev_priv, FW_DOMAIN_ID_RENDER, > FORCEWAKE_MT, FORCEWAKE_MT_ACK); > > + spin_lock_irq(&dev_priv->uncore.lock); > fw_domains_get_with_thread_status(dev_priv, FORCEWAKE_ALL); > ecobus = __raw_i915_read32(dev_priv, ECOBUS); > fw_domains_put_with_fifo(dev_priv, FORCEWAKE_ALL); > + spin_unlock_irq(&dev_priv->uncore.lock); > > if (!(ecobus & FORCEWAKE_MT_ENABLE)) { > DRM_INFO("No MT forcewake available on Ivybridge, this can result in issues\n"); > -- > 2.8.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx