RE: Assign BAR address for pci device after hotplug

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Thanks for your comments.
I am not sure if I can attach a picture to explain the HW config. Please find my comments for your questions inline.

Thanks
Divakar



-----Original Message-----
From: linux-hotplug-owner@xxxxxxxxxxxxxxx [mailto:linux-hotplug-owner@xxxxxxxxxxxxxxx] On Behalf Of Greg KH
Sent: Tuesday, August 02, 2016 10:12 PM
Cc: linux-hotplug@xxxxxxxxxxxxxxx
Subject: Re: Assign BAR address for pci device after hotplug

On Tue, Aug 02, 2016 at 09:11:09PM +0000, Chitturi, Divakar wrote:
> Hi
> 
> Below are two scenarios for which i would like to understand the right 
> way to assign the BAR address for my PCI device
> 
> Device details:
> pci switch upstrem port connected to root complex pci switch 
> downstream port 1 connected to my_pci_device my_pci_device is FPGA 
> FPGA has bunch of controllers and other logic
> 
> Driver details:
> Have a dedicated pci kernel driver for my_device Enabled pcihp kernel 
> driver

Which pci hotplug driver?  Just the PCI Hotplug core isn't going to do anything, you need a controller driver for your specific PCI hotplug hardware.

There is a hotplug/hotswap controller in the plx switch but this is not being used. The hp signals are no connect. However the is a kernel driver loaded for this switch/bridge.
The power control for the downstream devices is handled by a master FPGA (apart from the fpga in downstream port of pcieswitch ) in the system. So the master fpga acts like a hotplug controller ?
If that's the case, then there is no driver for the master fpga. I plan to develop one. Even in this case what is/are the functions to reassign the bar for the downstream devices.

> At power on, BIOS assigns/reserves specific region of memory for my pci device.
> during the linux boot process, pci core will assign the bar and other 
> initialization and call my probe function in the driver. probe 
> function will perform some initialization which includes reading the BAR and setting some registers in IO space of the device.
> 
> Scn1:
> At some point the device is removed and reinserted
> 
> Scn2:
> At some point similar device is inserted in a new pci slot

How are they added/removed without a hotplug controller?

> In both the scenarios explained about, BIOS is not involved as system 
> was never turned off completely. So 1. how do we obtain the BAR address for the device.

What architecture is this?  x86?  If so, it just uses whatever the BIOS said was there for the last time.
Yes this is x86. When a new device (downstream fpga of pcie switch)  is inserted after linux boot, and the BIOS has reserved the memory region for the BUS on which new device sits, who's responsibility is to assign the BAR to the new device?
If it's the Hotplug controller drivers responsibility, then what are the functions that needs to be invoked. 

> 2. Should i assign it explicitly? 

Yes.

> 3. if yes, should it be done in my driver ( in both the case i am 
> assuming driver's probe function will be called )

No, in your pci hotplug driver, you need to handle it there.
I would like to understand how to handle in the pci hotplug driver

> 4. can i use pci_assign_resource() in drivers probe function

Nope.

Right now by using this function in the probe function of the kernel driver for the new device (downstream fpga of pcie switch ) inserted ( scn2 ) it is able to obtain the BAR and I can access the IO space and read /write.
However I am not convinced if this is the right way to do it.

> 5. is something like below the right way to do it ?
> 
> static int my_probe(struct pci_dev *pdev, const struct pci_device_id 
> *id) {
>          if( pci_resource_start (pdev,BAR0) <= 0) {
>                 pr_debug(" Assign BAR0 \n");
> 	ret = pci_assign_resource(pdev,BAR0);
>                 if( 0 > ret) {
>                     dev_err(&pdev->dev, " Failed to assign resource \n");
>                     return ret;
>                 }
>         }
> 		
>        ret = pci_enable_device(pdev);
>        ret = pci_request_regions(pdev, dev_driver_string(&pdev->dev));
>        base_addr = pci_iomap(pdev, BAR0, 0); }

You need to write a pci hotplug controller driver to manage the resources and assign them properly.  That's its responsibility, see the PCI hotplug specification for all of the details...

Can you point me to a sample which handles the BAR assignment in hotplug scenario for me to understand better?

good luck!

greg k-h
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