> On 01 Jun 2017, at 10:28, Andreas Schwab <schwab@xxxxxxx> wrote: > > The sh1dc implementation is making unaligned accesses, which will crash > on some architectures, others have to emulate them in software. Is SPARC an architecture that would run into this problem? I think there was a thread a few days ago about this... What architectures are affected by this? I think I read somewhere that ARM requires aligned accesses, too, right? I wonder if it makes sense to emulate SPARC/ARM/... with QEMU on TravisCI [1]. Is this what you had in mind with "emulate" or do you see a better way? If we compile and test in this environment - we should be able to catch those bugs, right? - Lars [1] https://www.tomaz.me/2013/12/02/running-travis-ci-tests-on-arm.html