Hello! I'm currently dealing with what looks like a compiler bug to me: the compiler generates a VLDR instruction for an address that at runtime may not be 4-byte-aligned. So far, we have encountered this behavior only when passing variables to the spdlog logging function. Here's an example: https://godbolt.org/z/168PaedWz (unfortunately, I have not been able to reduce the example any further). The offending instruction is on line 17416 in the generated assembly: vldr.64 d16, [r3] During runtime register r3 contains the address to `data.id` which is not correctly aligned. GCC 10 and above do not exhibit this behavior, which makes me wonder, if this is indeed an error that has been fixed or if newer compilers generate working code only coincidentally. Christian
