Thanks for your quick answer, I have opened
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116662
On 2024-09-10 20:15, Jonathan Wakely wrote:
On Tue, 10 Sept 2024 at 13:07, Levi Zim <rsworktech@xxxxxxxxxxx> wrote:
Hi there,
First time posting here so sorry if I posted to the wrong lists.
I have a question about the std::hardware_destructive_interference_size
constant value on riscv64.
As documented on cppreference[1], hardware_destructive_interference_size
provide a portable way to access the L1 data cache line size. And
Raymond mentions hardware_destructive_interference_size tells you
(basically) the size of a cache line in his blog[2].
But this value is 32 for riscv64, which seems wrong to me because IIRC
many riscv64 cpus have cacheline of size 64.
This value is defined to be __GCC_DESTRUCTIVE_SIZE. And Clang takes this
value from gcc when implementing their __GCC_DESTRUCTIVE_SIZE. In
general I am not familiar with the gcc code base and didn't find the
definition of this constant for riscv64 target. So I would really
appreciate it if anyone could explain why this value is 32 for riscv64.
Because the riscv64 target maintainers didn't define any specific
value for their target.
The predefined macro is defined here:
gcc/c-family/c-cppbuiltin.cc: builtin_define_with_int_value
("__GCC_DESTRUCTIVE_SIZE",
Which uses the param_destruct_interfere_size variable which can be
defined on the command line using --param and if not defined, uses the
l1 cache size (which can also be defined with --param):
/* Check that the hardware interference sizes are at least
alignof(max_align_t), as required by the standard. */
const int max_align = max_align_t_align () / BITS_PER_UNIT;
if (OPTION_SET_P (param_destruct_interfere_size))
{
if (param_destruct_interfere_size < max_align)
error ("%<--param destructive-interference-size=%d%> is less than "
"%d", param_destruct_interfere_size, max_align);
else if (param_destruct_interfere_size < param_l1_cache_line_size)
warning (OPT_Winterference_size,
"%<--param destructive-interference-size=%d%> "
"is less than %<--param l1-cache-line-size=%d%>",
param_destruct_interfere_size, param_l1_cache_line_size);
}
else if (param_destruct_interfere_size)
/* Assume the internal value is OK. */;
else if (param_l1_cache_line_size >= max_align)
param_destruct_interfere_size = param_l1_cache_line_size;
/* else leave it unset. */
The L1 cache size also isn't defined explicitly for RISC-V 64 so it
uses the default value of 32:
gcc/params.opt:Common Joined UInteger Var(param_l1_cache_line_size)
Init(32) Param Optimization
Please file a bug for the RISC-V target asking them to set it
correctly. In the meanwhile, you can use --param to set your desired
value.
And here's a godbolt link: https://godbolt.org/z/avWMbr8dK
[1]:
https://en.cppreference.com/w/cpp/thread/hardware_destructive_interference_size
[2]: https://devblogs.microsoft.com/oldnewthing/20230424-00/?p=108085
[3]: https://github.com/llvm/llvm-project/pull/89446#issuecomment-2070649367
Cheers,
Levi
