在 2024-05-17 00:18, anand akhare 写道:
thanks everyone for replies. I am referring intel sw dev manual and it is sufficient for my work. It is true intel provides instructions but when instruction support is added in gnu assembler i was sort of hoping it will be documented somewhere. However, that is not necessary because gnu syntax is quite intuitive and if instruction is supported, it is easy to figure out how it will work by gnu syntax.
As a matter of fact (maybe of all facts), there are always surprises! For example, on https://sourceware.org/binutils/docs/as/i386_002dVariations.html, there is ... Mnemonic suffixes of ‘x’, ‘y’ and ‘z’ specify xmm (128-bit vector), ymm (256-bit vector) and zmm (512-bit vector) memory references, only when there’s no other way to disambiguate an instruction. ...which is wrong. SIMD instructions never have suffixes. This also means the SSE `movq` instruction collides with the ALU instruction:
; at&t ; binary ; intel ;----------------------------------------------------------- movq %rcx, %rax ; 48 89 C8 ; mov rax, rcx movq %xmm0, %rax ; 66 48 0F 7E C0 ; movq rax, xmm0 You have to remember that sometimes it's `movq` and not `mov`. Similarly, `movd`.Some instructions in Intel documentation have explicit operand size suffixes. In Intel syntax, string move instructions collide with SSE instructions:
; at&t ; binary ; intel ;-------------------------------------------------------------------------- movsl %ds:(%rsi%), %es:(%rdi) ; A5 ; movsd es:[rdi], ds:[rsi] movsd %xmm1, %xmm0 ; F2 0F 10 C1 ; movsd xmm0, xmm1Sign- and zero-extending instructions are documented on https://sourceware.org/binutils/docs/as/i386_002dMnemonics.html:
; at&t ; binary ; intel ; operation ;----------------------------------------------------------- cbtw ; 66 98 ; cbw (*) ; ax = (int8) al cwtl ; 98 ; cwde ; eax = (int16) ax cltq ; 48 98 ; cdqe ; rax = (int32) eax cwtd ; 66 99 ; cwd ; dx: ax = (int16) ax cltd ; 99 ; cdq ; edx:eax = (int32) eax cqto (*) ; 48 99 ; cqo ; rdx:rax = (int64) raxIn AT&T syntax, these instructions write to a single register unless they end with `d`, but `cqto` is a special case. In Intel syntax, these instructions write to a single register if they end with `e`, but `cbw` is a special case instead.
In Intel syntax, the DWORD-to-QWORD sign extension instruction is called `movsxd` instead of plain `movsx`.
In AT&T syntax, the special move instructions about RAX that take 64-bit immediates or absolute addresses are called `movabsq` instead of plain `movq`, but GAS accepts both (and even in intel mode).
And finally, there is a bug in AT&T syntax that nobody wants to fix: https://sourceware.org/binutils/docs/as/i386_002dBugs.html
-- Best regards, LIU Hao
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