GCC veneer code

[Xingyi Li via Gcc-help <gcc-help@xxxxxxxxxxx>]

Hi,
I am using gcc-10.2-arm32-eabi with Cortex-R52 processors. The veneer code inserted by the compiler is possibly wrong.
Take IRQ_Handler for example, the veneer code is like below. The first instruction is bx pc, which always switches CPSR to ARM mode. However, my whole project is using Thumb instructions. Can you please help explain how to make the veneer code right, like adding compiler options?

<__IRQ_Handler_veneer>:
  bx pc
  b.n 35811fa0 <__IRQ_Handler_veneer>
  ldr pc, [pc, #-4]
  .word 0x7dac0cfc


Regards
XingYi Li（李星毅）