Re: gcc 10.2.0 mtocrf instructions on Freescale P1014 (ppc)

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On Fri, Apr 09, 2021 at 08:40:42AM +0000, Barbier, Renaud wrote:
> > From: Segher Boessenkool [mailto:segher@xxxxxxxxxxxxxxxxxxx]
> > You'll have to check how the assembler is called.  Add "-v" to the gcc
> > command you use to see.  You normally should get something like
> > "-a32 -me500 -many -mbig", but you probably get something else (or it
> > should work :-) )

>  /opt/owc_toolchains/dev/tethys/sysroots/x86_64-owcsdk-linux/usr/libexec/powerpc-oe-linux/gcc/powerpc-oe-linux/10.2.0/as -v -I ./arch/powerpc/include -I ./arch/powerpc/include/generated -I ./include -I ./arch/powerpc/include/uapi -I ./arch/powerpc/include/generated/uapi -I ./include/uapi -I ./include/generated/uapi -I ./arch/powerpc -mppc -many -mbig -me500 -o arch/powerpc/mm/fault.o

This should work fine.  The relevant code in binutils is

  /* If only one bit of the FXM field is set, we can use the new form
     of the instruction, which is faster.  Unlike the Power4 branch hint
     encoding, this is not backward compatible.  Do not generate the
     new form unless -mpower4 has been given, or -many and the two
     operand form of mfcr was used.  */
  else if (value > 0
           && (value & -value) == value
           && ((dialect & PPC_OPCODE_POWER4) != 0
               || ((dialect & PPC_OPCODE_ANY) != 0
                   && (insn & (0x3ff << 1)) == 19 << 1)))
    insn |= 1 << 20;

so I can only conclude that you configured your binutils to default to
Power4 as well?  (Or something I don't see is going on.)

> > It will also help if you told us the flags you used to configure.

That for gcc as well as binutils.

Also, if you use modified code (not the FSF releases, something from a
BSP for example), all bets are off of course.


Segher



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