Is it possible to configure the current (9.3 or 10.2) GNU GCC bare-metal compiler to use the LLP64 data model for targeting the 64-bit ARM Cortex-A53? My current project involves porting legacy embedded C++ code that is running on a 32-bit Cortex-A9 processor to a 64-bit Cortex-A53 processor. Since this is an embedded system, many of the data structures are mapped to hardware memory-mapped registers. These registers were defined as 'unsigned long' which the previous GCC 32-bit compiler defines as 32 bits in size that matches the register hardware in the legacy system. I see that the GCC 64 bit compiler uses the LP64 data model where 'unsigned long' is 64 bits in size. Having unsigned longs go from 32 bits to 64 would break the register memory mapping. The data model LLP64 used by Win64 defines 'unsigned long' as 32 bits. I understand that this is to support the legacy data structures in the Windows world. I could redefine all of the memory mapped registers to 'unsigned int' in the source code but there are a lot of them and I'm concerned about destabilizing the code. So is it possible to configure the GCC compiler to use the LLP64 data model? Thanks, Steve ________________________________ The information contained in this message may be confidential and legally protected under applicable law. The message is intended solely for the addressee(s). If you are not the intended recipient, you are hereby notified that any use, forwarding, dissemination, or reproduction of this message is strictly prohibited and may be unlawful. If you are not the intended recipient, please contact the sender by return e-mail and destroy all copies of the original message.
