Re: Why does GCC drop "+simd" for the assembler if compiling for Armv8-A or Armv8-R?

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On 03/12/2020 13:25, Sebastian Huber wrote:

Hello,

I have a problem that assembler files assembled by GCC issue errors due to incomplete architecture and FPU options which should be provided by the assembler command line and not as directives in the file. For example:

arm-rtems6-gcc -save-temps -c test.c -mthumb -march=armv8-a+crc+simd -mfloat-abi=hard -wrapper echo /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -E -quiet -D__USES_INITFINI__ test.c -mthumb -mfloat-abi=hard -march=armv8-a+crc+simd -fpch-preprocess -o test.i /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -fpreprocessed test.i -quiet -dumpbase test.c -mthumb -mfloat-abi=hard -march=armv8-a+crc+simd -auxbase test -o test.s /tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/as -march=armv8-a+crc -mfloat-abi=hard -meabi=5 -o test.o test.s

arm-rtems6-gcc -save-temps -c test.c -mthumb -march=armv8-r+crc+simd -mfloat-abi=hard -wrapper echo /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -E -quiet -D__USES_INITFINI__ test.c -mthumb -mfloat-abi=hard -march=armv8-r+crc+simd -fpch-preprocess -o test.i /tmp/sh/rtems/6/lib/gcc/arm-rtems6/10.2.1/cc1 -fpreprocessed test.i -quiet -dumpbase test.c -mthumb -mfloat-abi=hard -march=armv8-r+crc+simd -auxbase test -o test.s /tmp/sh/rtems/6/lib64/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/as -march=armv8-r+crc -mfloat-abi=hard -meabi=5 -o test.o test.s

The assembler is called without the "+simd". In Armv7-A and Armv7-R the FPU was selected by -mfpu options.

It is discarded by arm_rewrite_selected_arch() probably because

(gdb) p *entry
$16 = {name = 0x4c1acc "simd", remove = false, alias = false, isa_bits = {isa_bit_fp_d32, isa_bit_fp_dbl, isa_bit_fp16conv, isa_bit_fpv5, isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon, isa_nobit <repeats 54 times>}}

and

#define ISA_ALL_FPU_INTERNAL \
  isa_bit_fp16conv, \
  isa_bit_crypto, \
  isa_bit_vfpv2, \
  isa_bit_vfpv3, \
  isa_bit_vfpv4, \
  isa_bit_fpv5, \
  isa_bit_neon, \
  isa_bit_fp_dbl, \
  isa_bit_fp_d32

So

(gdb) p/x fpu_bits
$17 = {m_bitmap = 0x778e60}
(gdb) p/x opt_bits
$18 = {m_bitmap = 0x778e20}

    if (!bitmap_subset_p (opt_bits, fpu_bits))
        optlist.push_back (entry->name);

doesn't push back entry->name.

Is this a bug or a feature?

The assembler doesn't complain about a -march=armv8-r+crc+simd and it makes the assembler error go away, for example:

../../../cpukit/score/cpu/arm/cpu_asm.S: Assembler messages:
../../../cpukit/score/cpu/arm/cpu_asm.S:64: Error: selected processor does not support `vstm r5,{d8-d15}' in ARM mode ../../../cpukit/score/cpu/arm/cpu_asm.S:110: Error: selected processor does not support `vldm r5,{d8-d15}' in ARM mode

--
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Herr Sebastian HUBER
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