I replaced the iterator ANYF with SFmode.
(define_expand "mul<mode>3"
[(match_operand:ANYF 0 "register_operand" "=f")
(match_operand:ANYF 1 "register_operand" " f")
(match_operand:ANYF 2 "register_operand" " f")]
"TARGET_HARD_FLOAT"
{
rtx reg = gen_reg_rtx (SImode);
emit_insn(gen_modfloatmul(operands[0], operands[1], operands[2]));
if( fpexception == 3)
{ emit_insn(gen_riscv_frflags(reg));}
DONE;
})
(define_insn "modfloatmul"
[(set (match_operand:SF 0 "register_operand" "=f")
(mult:SF (match_operand:SF 1 "register_operand" " f")
(match_operand:SF 2 "register_operand" " f")))]
"TARGET_HARD_FLOAT"
"fmul.<fmt>\t%0,%1,%2"
)
The build fails with message:
/home/faisal/riscv-tools/riscv-gnu-toolchain/build/../riscv-newlib/newlib/libc/stdlib/__adjust.c:
In function '__adjust':
/home/faisal/riscv-tools/riscv-gnu-toolchain/build/../riscv-newlib/newlib/libc/stdlib/__adjust.c:43:1:
error: unrecognizable insn:
}
^
(insn 63 60 64 13 (set (reg:DF 95)
(mult:SF (reg:DF 76 [ _5 ])
(reg/v:DF 77 [ <retval> ])))
"/home/faisal/riscv-tools/riscv-gnu-toolchain/build/../riscv-newlib/newlib/libc/stdlib/__adjust.c":42
-1
(nil))
during RTL pass: vregs
/home/faisal/riscv-tools/riscv-gnu-toolchain/build/../riscv-newlib/newlib/libc/stdlib/__adjust.c:43:1:
internal compiler error: in extract_insn, at recog.c:2304
0x5982a3 _fatal_insn(char const*, rtx_def const*, char const*, int, char
const*)
../../../riscv-gcc/gcc/rtl-error.c:108
0x5982bf _fatal_insn_not_found(rtx_def const*, char const*, int, char
const*)
../../../riscv-gcc/gcc/rtl-error.c:116
0xb139c3 extract_insn(rtx_insn*)
../../../riscv-gcc/gcc/recog.c:2304
0x8ae3f3 instantiate_virtual_regs_in_insn
../../../riscv-gcc/gcc/function.c:1599
0x8ae3f3 instantiate_virtual_regs
../../../riscv-gcc/gcc/function.c:1969
0x8ae3f3 execute
../../../riscv-gcc/gcc/function.c:2018
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.
make[6]: *** [lib_a-__adjust.o] Error 1
Although riscv64-unknown-elf-gcc gets generated.
When i compile a program containing floating point multiplication, i get
this assembler message:
/tmp/ccosgNwo.s: Assembler messages:
/tmp/ccosgNwo.s:39: Error: unrecognized opcode `fmul.<fmt> fa5,fa4,fa5'
/tmp/ccosgNwo.s:47: Error: unrecognized opcode `fmul.<fmt> fa5,fa4,fa5'
/tmp/ccosgNwo.s:55: Error: unrecognized opcode `fmul.<fmt> fa5,fa4,fa5'
My new insn is not getting recognized. Is there any way that i can add my
new instruction pattern name to defined pattern names?
On Fri, Jul 12, 2019 at 7:43 PM Segher Boessenkool <
segher@xxxxxxxxxxxxxxxxxxx> wrote:
> On Fri, Jul 12, 2019 at 07:37:51PM +0530, Faisal Riyaz wrote:
> > Build fails with messsage:
> >
> > In file included from ../../../riscv-gcc/gcc/target.h:51:0,
> > from ../../../riscv-gcc/gcc/attribs.c:23:
> > ./insn-codes.h:19:12: error: stray ‘@’ in program
> > CODE_FOR_@modsffloatmul_insn = 17,
> > ^
>
> If you are using an old GCC version, you cannot use parameterized names.
>
>
> Segher
>
