Hi All --
I'm updating GCC on a dual-endianity processor. In little-endian mode,
memory is little-endian, but the core remains big-endian. Double-word
values are in even/odd register pairs, with the MSW in the
lower-numbered (even) register. Values in memory are stored with LSW in
the low-address word.
From info:
REG_WORDS_BIG_ENDIAN [Macro]
On some machines, the order of words in a multiword object differs
between registers in memory. In such a situation, define this macro
to describe the order of words in a register. The macro
WORDS_BIG_ENDIAN controls the order of words in memory.
I set REG_WORDS_BIG_ENDIAN to 1 and WORDS_BIG_ENDIAN to the memory
endianity.
None of the targets in the GCC repo define this. Does anyone know of an
out-of-repo target which sets REG_WORDS_BIG_ENDIAN?
Most test cases pass, but I'm finding a few cases which fail to
calculate a subreg correctly. Subreg_lowpart_offset() is called while
emitting RTL, for example, to truncate a DImode integer to SImode. But
subreg_lowpart_offset() does not know whether it is computing the offset
of a memory value or register value. It returns the word offset
according to memory endianity, ignoring REG_WORDS_BIG_ENDIAN. (This is
also the case with subreg_size_lowpart_offset()).
I'm working on a patch to pass the inner RTX to subreg_lowpart_offset(),
but this function is called in many places and it isn't always clear
what object the subreg applies to, or even if there is an object. For
example, maybe_mode_change() calls subreg_size_lowpart_offset() before
generating a REG rtx. This seems to be the wrong approach.
There are other subreg functions which seem to be specifically for
registers, like subreg_get_info() and subreg_regno_offset(). It isn't
clear whether these can replace any of the calls to subreg_lowpart_offset().
Anyone have any advice?
--
Michael Eager eager@xxxxxxxxxxxx
1960 Park Blvd., Palo Alto, CA 94306
