Hi!
On Sun, Jan 28, 2018 at 02:32:56PM +0100, Sébastien Michelland wrote:
> I am trying to generate a call to the SH-4A unaligned move "movua.l
> @rm+, r0" instruction. Currently my inline-assembly approach using
> the '>' constraint is rejected by the compiler:
>
> #include <stdint.h>
>
> void f(void)
> {
> uint32_t longword, *src;
> __asm__(
> "movua.l %1, %0"
> : "=z" (longword)
> : ">" (src)
> );
> }
>
> % sh3eb-elf-gcc -S movua.c -o movua.s -ffreestanding
> movua.c: In function 'f':
> movua.c:6:2: warning: asm operand 1 probably doesn't match constraints
> __asm__(
> ^~~~~~~
> movua.c:6:2: error: impossible constraint in 'asm'
>
> I have tried a lot of variations to no avail.
>
> Am I using the '>' constraint the wrong way? What would be the proper
> way to generate this instruction?
You should use "m>", or the compiler will not know what to do in most
(all?) cases.
You should use "m>"(*src) (note the star) because this should be a
memory operand, not the pointer.
You need to use "longword" or the whole asm can be optimised away.
You need to arrange for src+1 to be used somehow, or the compiler will
not choose to do a post-increment.
This works as expected:
===
long bla;
long *p;
void f(long *src)
{
long longword;
__asm__("movua.l %1, %0" : "=z" (longword) : "m>" (*src));
bla = longword;
p = src+1;
}
===
resulting in
===
f:
mov.l .L3,r1
#APP
movua.l @r4+, r0
#NO_APP
mov.l r0,@r1
mov.l .L4,r1
rts
mov.l r4,@r1
===
Segher
