can someone help me in generating bitfield insert and extract instructions? On Wed, May 31, 2017 at 12:22 AM, Mahesh Bodapati <maheshbodapati90@xxxxxxxxx> wrote: > Hi, > > > > I have added bitfield insert and bitfield extract instructions for > risc target like below.. > > > > (define_expand "insv" > > [(set (zero_extract:SI (match_operand 0 "register_operand" "+r") > > (match_operand 1 "const_int_M_operand" "S") > > (match_operand 2 "const_int_M_operand" "S")) > > (match_operand 3 "register_operand" "r"))] > > "TARGET_HAS_BITFIELD" > > > > > > > > (define_insn "insv_32" > > [(set (zero_extract (match_operand 0 "register_operand" "+r") > > (match_operand 1 "const_int_M_operand" "S") > > (match_operand 2 "const_int_M_operand" "S")) > > (match_operand 3 "register_operand" "r"))] > > "TARGET_HAS_BITFIELD && UINTVAL (operands[1]) > 0 > > && UINTVAL (operands[1]) + UINTVAL (operands[2]) <= 32" > > "bsi %0, %3, %1, %2" > > > > > > (define_constraint "S" > > "A constant in the range 0 to 31 (inclusive)." > > (and (match_code "const_int") > > (match_test "ival > 0 && ival < 0x20"))) > > > > but I didn't see the bitfield insert instruction when I compiled a c > code which has structure bitfield assignments. I have seen a > combination of ori and andi instructions where as in ARM,I have seen > the bitfield insert instruction. > > > > > > any suggestions? > > > > > > Thanks, > > Mahesh
