Re: Memory model release/acquire mode interactions of relaxed atomic operations

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On 04/05/17 15:01, Jonathan Wakely wrote:
> On 4 May 2017 at 13:56, Toebs Douglass <toby@xxxxxxxxxxxxxx> wrote:

> Yes, to explicitly specify the memory ordering.
> 
> x == 10 is exactly equivalent to x.load(memory_order_seq_cst) == 10.

Ah!  operator overloading, right?  this wacky C++ stuff :-)

So now I understand.

> i.e. the default ordering is SC.

Right.  I have in fact been misreading this (and so Andrew) to mean
Store Conditional, i.e I thought he was talking about LL/SC and atomic
writes.

> x = 1 is exactly equivalent to x.store(memory_order_seq_cst).
> 
> http://en.cppreference.com/w/cpp/atomic/atomic/operator%3D

It looks like it's doing an atomic exchange, but it's not necessarily so
and where I *think* I've seen GCC only using memory barriers for stuff
it called "atomic", I'm not sure.  I don't code in C++, though, so we
can leave it at this point.





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