I am porting gcc backend to a new target, I understood that there is a target_rtx_costs macro and i am currently looking into it, for my target it will be mainly on the code size. I have some experience porting sdcc ( small device C compiler ) the way they do it is ,they will try different of register allocation and compare the cost with each other and it took a long time to compile, just want to know if gcc do it any differently. -- View this message in context: http://gcc.1065356.n5.nabble.com/gcc-instruction-cost-tp1194316p1194519.html Sent from the gcc - Help mailing list archive at Nabble.com.
