On Mon, Oct 12, 2015 at 3:58 PM, Florian Weimer <fweimer@xxxxxxxxxx> wrote:
> On 10/12/2015 07:41 PM, Jeffrey Walton wrote:
>
>> while (size && safety)
>> {
>> char rc;
>> __asm__ volatile(
>> #if BOOL_X86
>> "rdrandl %0 ; setc %1"
>> #else
>> "rdrandq %0 ; setc %1"
>> #endif
>> : "=rm" (val), "=qm" (rc)
>> :
>> : "cc"
>> );
>
> I don't think RDRAND supports memory operand, so the constraint is
> incorrect, and a width suffix is not required.
Thanks Florian. You might be right... I'll have to check the Intel manual again.
According to the Intel manual [1], it looks like its a R/W
instruction. But I can switch up to R-only if its needed...
>> if (rc)
>> {
>> size_t count = (size < sizeof(val) ? size : sizeof(val));
>> memcpy(output, &val, count);
>> size =- count;
Ah, thanks. Hopefully the wrinkles will get ironed out once I get it
assembled and under the debugger.
Jeff
[1] https://www-ssl.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf,
p. 4-298.
