On Sun, May 03, 2015 at 03:22:20PM -0500, ftwilliam wrote:
> My architecture has the following instructions:
> seq %1, %2;
> slt %1, %2;
> sgt %1, %2;
>
> which are used to set the value of a register depending on the
> comparison associated with those instructions.
>
> What pattern should I define in order to output such instruction when
> I have an expression such as:
> v1 = (v2 == v3);
>
> Currently GCC, match the pattern "cbranchsi4", resulting in branching
> instructions generated; but I wish to avoid the generation of
> branching instructions.
>
> So, please, what pattern should I define ?
cstore{mode}4. See doc/md.texi (and tm.texi).
Segher
