Hi Jeff,
My apologies; I am new to porting GCC; I simply replayed my changed
from 4.9.2 and did not recognized the error message as something that
I missed.
Please see attached the patch against trunk; I used the following when building:
../gcc-repo/configure --prefix=/opt/myarchtoolchain
--target=myarch-elf --enable-languages=c
The issue is reproduceable only if there is a myarch-elf binutils
installed at the --prefix used with ./configure.
Renaming the following tools from a different architecture is quick
way to reproduce the issue without building a binutils for myarch:
myarch-elf-strip
myarch-elf-ar
myarch-elf-gprof
myarch-elf-c++filt
myarch-elf-strings
myarch-elf-nm
myarch-elf-as
myarch-elf-elfedit
myarch-elf-size
myarch-elf-readelf
myarch-elf-addr2line
myarch-elf-ranlib
myarch-elf-objcopy
myarch-elf-ld
myarch-elf-objdump
myarch-elf-ld.bfd
On Thu, Apr 9, 2015 at 3:36 PM, Jeff Law <law@xxxxxxxxxx> wrote:
> On 04/08/2015 07:02 AM, ftwilliam wrote:
>>
>> Hi Jeff,
>>
>> See attached patch against trunk.
>
> BTW, when I asked you send the patch along, I assumed that you would have
> verified that it was still failing on the trunk.
>
> jeff
>
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 9d3fa57..8bc05a2 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1,5 +1,5 @@
# GCC target-specific configuration file.
-# Copyright (C) 1997-2014 Free Software Foundation, Inc.
+# Copyright (C) 1997-2013 Free Software Foundation, Inc.
#This file is part of GCC.
@@ -246,7 +246,6 @@ md_file=
case ${target} in
picochip-* \
| score-* \
- | *-*-solaris2.9* \
)
if test "x$enable_obsolete" != xyes; then
echo "*** Configuration ${target} is obsolete." >&2
@@ -313,7 +312,7 @@ aarch64*-*-*)
cpu_type=aarch64
need_64bit_hwint=yes
extra_headers="arm_neon.h"
- extra_objs="aarch64-builtins.o aarch-common.o"
+ extra_objs="aarch64-builtins.o"
target_has_targetm_common=yes
;;
alpha*-*-*)
@@ -324,17 +323,12 @@ alpha*-*-*)
am33_2.0-*-linux*)
cpu_type=mn10300
;;
-arc*-*-*)
- cpu_type=arc
- ;;
arm*-*-*)
cpu_type=arm
- extra_objs="aarch-common.o"
- extra_headers="mmintrin.h arm_neon.h arm_acle.h"
+ extra_headers="mmintrin.h arm_neon.h"
target_type_format_char='%'
c_target_objs="arm-c.o"
cxx_target_objs="arm-c.o"
- need_64bit_hwint=yes
extra_options="${extra_options} arm/arm-tables.opt"
;;
avr-*-*)
@@ -372,11 +366,9 @@ i[34567]86-*-*)
immintrin.h x86intrin.h avxintrin.h xopintrin.h
ia32intrin.h cross-stdarg.h lwpintrin.h popcntintrin.h
lzcntintrin.h bmiintrin.h bmi2intrin.h tbmintrin.h
- avx2intrin.h avx512fintrin.h fmaintrin.h f16cintrin.h
- rtmintrin.h xtestintrin.h rdseedintrin.h prfchwintrin.h
- adxintrin.h fxsrintrin.h xsaveintrin.h xsaveoptintrin.h
- avx512cdintrin.h avx512erintrin.h avx512pfintrin.h
- shaintrin.h"
+ avx2intrin.h fmaintrin.h f16cintrin.h rtmintrin.h
+ xtestintrin.h rdseedintrin.h prfchwintrin.h adxintrin.h
+ fxsrintrin.h xsaveintrin.h xsaveoptintrin.h"
;;
x86_64-*-*)
cpu_type=i386
@@ -389,11 +381,9 @@ x86_64-*-*)
immintrin.h x86intrin.h avxintrin.h xopintrin.h
ia32intrin.h cross-stdarg.h lwpintrin.h popcntintrin.h
lzcntintrin.h bmiintrin.h tbmintrin.h bmi2intrin.h
- avx2intrin.h avx512fintrin.h fmaintrin.h f16cintrin.h
- rtmintrin.h xtestintrin.h rdseedintrin.h prfchwintrin.h
- adxintrin.h fxsrintrin.h xsaveintrin.h xsaveoptintrin.h
- avx512cdintrin.h avx512erintrin.h avx512pfintrin.h
- shaintrin.h"
+ avx2intrin.h fmaintrin.h f16cintrin.h rtmintrin.h
+ xtestintrin.h rdseedintrin.h prfchwintrin.h adxintrin.h
+ fxsrintrin.h xsaveintrin.h xsaveoptintrin.h"
need_64bit_hwint=yes
;;
ia64-*-*)
@@ -425,13 +415,9 @@ mips*-*-*)
extra_headers="loongson.h"
extra_options="${extra_options} g.opt mips/mips-tables.opt"
;;
-nds32*)
- cpu_type=nds32
- extra_headers="nds32_intrinsic.h"
- ;;
-nios2-*-*)
- cpu_type=nios2
- extra_options="${extra_options} g.opt"
+negrocore-*-*)
+ cpu_type=negrocore
+ target_has_targetm_common=no
;;
picochip-*-*)
cpu_type=picochip
@@ -477,7 +463,6 @@ sh[123456789lbe]*-*-* | sh-*-*)
cpu_type=sh
need_64bit_hwint=yes
extra_options="${extra_options} fused-madd.opt"
- extra_objs="${extra_objs} sh_treg_combine.o sh-mem.o sh_optimize_sett_clrt.o"
;;
v850*-*-*)
cpu_type=v850
@@ -494,7 +479,7 @@ tilegx*-*-*)
cpu_type=tilegx
need_64bit_hwint=yes
;;
-tilepro*-*-*)
+tilepro-*-*)
cpu_type=tilepro
need_64bit_hwint=yes
;;
@@ -516,27 +501,6 @@ then
fi
case ${target} in
-aarch64*-*-*)
- tm_p_file="${tm_p_file} arm/aarch-common-protos.h"
- case ${with_abi} in
- "")
- if test "x$with_multilib_list" = xilp32; then
- tm_file="aarch64/biarchilp32.h ${tm_file}"
- else
- tm_file="aarch64/biarchlp64.h ${tm_file}"
- fi
- ;;
- ilp32)
- tm_file="aarch64/biarchilp32.h ${tm_file}"
- ;;
- lp64)
- tm_file="aarch64/biarchlp64.h ${tm_file}"
- ;;
- *)
- echo "Unknown ABI used in --with-abi=$with_abi"
- exit 1
- esac
- ;;
i[34567]86-*-*)
if test "x$with_abi" != x; then
echo "This target does not support --with-abi."
@@ -577,11 +541,7 @@ x86_64-*-*)
fi
tm_file="vxworks-dummy.h ${tm_file}"
;;
-arm*-*-*)
- tm_p_file="${tm_p_file} arm/aarch-common-protos.h"
- tm_file="vxworks-dummy.h ${tm_file}"
- ;;
-mips*-*-* | sh*-*-* | sparc*-*-*)
+arm*-*-* | mips*-*-* | sh*-*-* | sparc*-*-*)
tm_file="vxworks-dummy.h ${tm_file}"
;;
esac
@@ -596,24 +556,6 @@ esac
# Common C libraries.
tm_defines="$tm_defines LIBC_GLIBC=1 LIBC_UCLIBC=2 LIBC_BIONIC=3"
-# 32-bit x86 processors supported by --with-arch=. Each processor
-# MUST be separated by exactly one space.
-x86_archs="athlon athlon-4 athlon-fx athlon-mp athlon-tbird \
-athlon-xp k6 k6-2 k6-3 geode c3 c3-2 winchip-c6 winchip2 i386 i486 \
-i586 i686 pentium pentium-m pentium-mmx pentium2 pentium3 pentium3m \
-pentium4 pentium4m pentiumpro prescott"
-
-# 64-bit x86 processors supported by --with-arch=. Each processor
-# MUST be separated by exactly one space.
-x86_64_archs="amdfam10 athlon64 athlon64-sse3 barcelona bdver1 bdver2 \
-bdver3 bdver4 btver1 btver2 k8 k8-sse3 opteron opteron-sse3 nocona \
-core2 corei7 corei7-avx core-avx-i core-avx2 atom slm nehalem westmere \
-sandybridge ivybridge haswell broadwell bonnell silvermont x86-64 native"
-
-# Additional x86 processors supported by --with-cpu=. Each processor
-# MUST be separated by exactly one space.
-x86_cpus="generic intel"
-
# Common parts for widely ported systems.
case ${target} in
*-*-darwin*)
@@ -702,15 +644,11 @@ case ${target} in
native_system_header_dir=/include
;;
esac
- # Linux C libraries selection switch: glibc / uclibc / bionic.
+ # glibc / uclibc / bionic switch.
# uclibc and bionic aren't usable for GNU/Hurd and neither for GNU/k*BSD.
case $target in
*linux*)
- tm_p_file="${tm_p_file} linux-protos.h"
- tmake_file="${tmake_file} t-linux"
- extra_objs="${extra_objs} linux.o"
- extra_options="${extra_options} linux.opt"
- ;;
+ extra_options="$extra_options linux.opt";;
esac
case $target in
*-*-*android*)
@@ -728,6 +666,13 @@ case ${target} in
default_use_cxa_atexit=yes
use_gcc_tgmath=no
use_gcc_stdint=wrap
+ # Add Android userspace support to Linux targets.
+ case $target in
+ *linux*)
+ tm_file="$tm_file linux-android.h"
+ extra_options="$extra_options linux-android.opt"
+ ;;
+ esac
# Enable compilation for Android by default for *android* targets.
case $target in
*-*-*android*)
@@ -791,15 +736,8 @@ case ${target} in
;;
*-*-rtems*)
case ${enable_threads} in
- "" | yes | rtems) thread_file='rtems' ;;
- posix) thread_file='posix' ;;
- no) ;;
- *)
- echo 'Unknown thread configuration for RTEMS'
- exit 1
- ;;
+ yes) thread_file='rtems' ;;
esac
- tmake_file="${tmake_file} t-rtems"
extra_options="${extra_options} rtems.opt"
default_use_cxa_atexit=yes
use_gcc_stdint=wrap
@@ -866,14 +804,14 @@ case ${target} in
tmake_file=t-vxworks
xm_defines=POSIX
extra_options="${extra_options} vxworks.opt"
- extra_objs="$extra_objs vxworks.o"
+ extra_objs=vxworks.o
case ${enable_threads} in
no) ;;
"" | yes | vxworks) thread_file='vxworks' ;;
*) echo 'Unknown thread configuration for VxWorks'; exit 1 ;;
esac
;;
-*-*-elf|arc*-*-elf*)
+*-*-elf)
# Assume that newlib is being used and so __cxa_atexit is provided.
default_use_cxa_atexit=yes
use_gcc_stdint=wrap
@@ -891,22 +829,6 @@ aarch64*-*-elf)
tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1"
;;
esac
- aarch64_multilibs="${with_multilib_list}"
- if test "$aarch64_multilibs" = "default"; then
- aarch64_multilibs="lp64,ilp32"
- fi
- aarch64_multilibs=`echo $aarch64_multilibs | sed -e 's/,/ /g'`
- for aarch64_multilib in ${aarch64_multilibs}; do
- case ${aarch64_multilib} in
- ilp32 | lp64 )
- TM_MULTILIB_CONFIG="${TM_MULTILIB_CONFIG},${aarch64_multilib}"
- ;;
- *)
- echo "--with-multilib-list=${aarch64_multilib} not supported."
- exit 1
- esac
- done
- TM_MULTILIB_CONFIG=`echo $TM_MULTILIB_CONFIG | sed 's/^,//'`
;;
aarch64*-*-linux*)
tm_file="${tm_file} dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h"
@@ -917,24 +839,6 @@ aarch64*-*-linux*)
tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1"
;;
esac
- aarch64_multilibs="${with_multilib_list}"
- if test "$aarch64_multilibs" = "default"; then
- # TODO: turn on ILP32 multilib build after its support is mature.
- # aarch64_multilibs="lp64,ilp32"
- aarch64_multilibs="lp64"
- fi
- aarch64_multilibs=`echo $aarch64_multilibs | sed -e 's/,/ /g'`
- for aarch64_multilib in ${aarch64_multilibs}; do
- case ${aarch64_multilib} in
- ilp32 | lp64 )
- TM_MULTILIB_CONFIG="${TM_MULTILIB_CONFIG},${aarch64_multilib}"
- ;;
- *)
- echo "--with-multilib-list=${aarch64_multilib} not supported."
- exit 1
- esac
- done
- TM_MULTILIB_CONFIG=`echo $TM_MULTILIB_CONFIG | sed 's/^,//'`
;;
alpha*-*-linux*)
tm_file="elfos.h ${tm_file} alpha/elf.h alpha/linux.h alpha/linux-elf.h glibc-stdint.h"
@@ -960,54 +864,6 @@ alpha*-dec-*vms*)
tm_file="${tm_file} vms/vms.h alpha/vms.h"
tmake_file="${tmake_file} alpha/t-vms"
;;
-arc*-*-elf*)
- extra_headers="arc-simd.h"
- tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}"
- tmake_file="arc/t-arc-newlib arc/t-arc"
- case x"${with_cpu}" in
- xarc600|xarc601|xarc700)
- target_cpu_default="TARGET_CPU_$with_cpu"
- ;;
- esac
- if test x${with_endian} = x; then
- case ${target} in
- arc*be-*-* | arc*eb-*-*) with_endian=big ;;
- *) with_endian=little ;;
- esac
- fi
- case ${with_endian} in
- big|little) ;;
- *) echo "with_endian=${with_endian} not supported."; exit 1 ;;
- esac
- case ${with_endian} in
- big*) tm_defines="DRIVER_ENDIAN_SELF_SPECS=\\\"%{!EL:%{!mlittle-endian:-mbig-endian}}\\\" ${tm_defines}"
- esac
- ;;
-arc*-*-linux-uclibc*)
- extra_headers="arc-simd.h"
- tm_file="dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h ${tm_file}"
- tmake_file="${tmake_file} arc/t-arc-uClibc arc/t-arc"
- tm_defines="${tm_defines} TARGET_SDATA_DEFAULT=0"
- tm_defines="${tm_defines} TARGET_MMEDIUM_CALLS_DEFAULT=1"
- case x"${with_cpu}" in
- xarc600|xarc601|xarc700)
- target_cpu_default="TARGET_CPU_$with_cpu"
- ;;
- esac
- if test x${with_endian} = x; then
- case ${target} in
- arc*be-*-* | arc*eb-*-*) with_endian=big ;;
- *) with_endian=little ;;
- esac
- fi
- case ${with_endian} in
- big|little) ;;
- *) echo "with_endian=${with_endian} not supported."; exit 1 ;;
- esac
- case ${with_endian} in
- big*) tm_defines="DRIVER_ENDIAN_SELF_SPECS=\\\"%{!EL:%{!mlittle-endian:-mbig-endian}}\\\" ${tm_defines}"
- esac
- ;;
arm-wrs-vxworks)
tm_file="elfos.h arm/elf.h arm/aout.h ${tm_file} vx-common.h vxworks.h arm/vxworks.h"
extra_options="${extra_options} arm/vxworks.opt"
@@ -1020,7 +876,6 @@ arm*-*-netbsdelf*)
;;
arm*-*-linux-*) # ARM GNU/Linux with ELF
tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h arm/elf.h arm/linux-gas.h arm/linux-elf.h"
- extra_options="${extra_options} linux-android.opt"
case $target in
arm*b-*-linux*)
tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1"
@@ -1034,14 +889,22 @@ arm*-*-linux-*) # ARM GNU/Linux with ELF
tmake_file="$tmake_file arm/t-linux-androideabi"
;;
esac
+ # The BPABI long long divmod functions return a 128-bit value in
+ # registers r0-r3. Correctly modeling that requires the use of
+ # TImode.
+ need_64bit_hwint=yes
# The EABI requires the use of __cxa_atexit.
default_use_cxa_atexit=yes
with_tls=${with_tls:-gnu}
;;
arm*-*-uclinux*eabi*) # ARM ucLinux
tm_file="dbxelf.h elfos.h arm/unknown-elf.h arm/elf.h arm/linux-gas.h arm/uclinux-elf.h glibc-stdint.h"
- tmake_file="${tmake_file} arm/t-arm arm/t-arm-elf arm/t-bpabi"
+ tmake_file="arm/t-arm arm/t-arm-elf arm/t-bpabi"
tm_file="$tm_file arm/bpabi.h arm/uclinux-eabi.h arm/aout.h vxworks-dummy.h arm/arm.h"
+ # The BPABI long long divmod functions return a 128-bit value in
+ # registers r0-r3. Correctly modeling that requires the use of
+ # TImode.
+ need_64bit_hwint=yes
# The EABI requires the use of __cxa_atexit.
default_use_cxa_atexit=yes
;;
@@ -1050,9 +913,13 @@ arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtems*)
arm*eb-*-eabi*)
tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1"
esac
+ # The BPABI long long divmod functions return a 128-bit value in
+ # registers r0-r3. Correctly modeling that requires the use of
+ # TImode.
+ need_64bit_hwint=yes
default_use_cxa_atexit=yes
tm_file="dbxelf.h elfos.h arm/unknown-elf.h arm/elf.h arm/bpabi.h"
- tmake_file="${tmake_file} arm/t-arm arm/t-arm-elf"
+ tmake_file="arm/t-arm arm/t-arm-elf"
case ${target} in
arm*-*-eabi*)
tm_file="$tm_file newlib-stdint.h"
@@ -1061,7 +928,7 @@ arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtems*)
;;
arm*-*-rtems*)
tm_file="${tm_file} rtems.h arm/rtems-eabi.h newlib-stdint.h"
- tmake_file="${tmake_file} arm/t-bpabi arm/t-rtems-eabi"
+ tmake_file="${tmake_file} arm/t-bpabi t-rtems arm/t-rtems-eabi"
;;
arm*-*-symbianelf*)
tm_file="${tm_file} arm/symbian.h"
@@ -1074,7 +941,7 @@ arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtems*)
;;
avr-*-rtems*)
tm_file="elfos.h avr/elf.h avr/avr-arch.h avr/avr.h dbxelf.h avr/rtems.h rtems.h newlib-stdint.h"
- tmake_file="${tmake_file} avr/t-avr avr/t-multilib avr/t-rtems"
+ tmake_file="avr/t-avr avr/t-multilib t-rtems avr/t-rtems"
extra_gcc_objs="driver-avr.o avr-devices.o"
extra_objs="avr-devices.o avr-log.o"
;;
@@ -1084,7 +951,7 @@ avr-*-*)
tm_file="${tm_file} ${cpu_type}/avrlibc.h"
tm_defines="${tm_defines} WITH_AVRLIBC"
fi
- tmake_file="${tmake_file} avr/t-avr avr/t-multilib"
+ tmake_file="avr/t-avr avr/t-multilib"
use_gcc_stdint=wrap
extra_gcc_objs="driver-avr.o avr-devices.o"
extra_objs="avr-devices.o avr-log.o"
@@ -1101,12 +968,12 @@ bfin*-uclinux*)
;;
bfin*-linux-uclibc*)
tm_file="${tm_file} dbxelf.h elfos.h bfin/elf.h gnu-user.h linux.h glibc-stdint.h bfin/linux.h ./linux-sysroot-suffix.h"
- tmake_file="bfin/t-bfin-linux t-slibgcc t-linux"
+ tmake_file="bfin/t-bfin-linux t-slibgcc"
use_collect2=no
;;
bfin*-rtems*)
tm_file="${tm_file} dbxelf.h elfos.h bfin/elf.h bfin/rtems.h rtems.h newlib-stdint.h"
- tmake_file="${tmake_file} bfin/t-rtems"
+ tmake_file="t-rtems bfin/t-rtems"
;;
bfin*-*)
tm_file="${tm_file} dbxelf.h elfos.h newlib-stdint.h bfin/elf.h"
@@ -1135,7 +1002,8 @@ cris-*-elf | cris-*-none)
;;
crisv32-*-linux* | cris-*-linux*)
tm_file="dbxelf.h elfos.h ${tm_file} gnu-user.h linux.h glibc-stdint.h cris/linux.h"
- tmake_file="${tmake_file} cris/t-cris cris/t-linux"
+ # We need to avoid using t-linux, so override default tmake_file
+ tmake_file="cris/t-cris cris/t-linux t-slibgcc"
extra_options="${extra_options} cris/linux.opt"
case $target in
cris-*-*)
@@ -1179,11 +1047,11 @@ moxie-*-uclinux*)
tmake_file="${tmake_file} moxie/t-moxie"
;;
moxie-*-rtems*)
- tmake_file="${tmake_file} moxie/t-moxie"
+ tmake_file="${tmake_file} moxie/t-moxie t-rtems"
tm_file="moxie/moxie.h dbxelf.h elfos.h moxie/rtems.h rtems.h newlib-stdint.h"
;;
h8300-*-rtems*)
- tmake_file="${tmake_file} h8300/t-h8300 h8300/t-rtems"
+ tmake_file="h8300/t-h8300 t-rtems h8300/t-rtems"
tm_file="h8300/h8300.h dbxelf.h elfos.h h8300/elf.h h8300/rtems.h rtems.h newlib-stdint.h"
;;
h8300-*-elf*)
@@ -1208,6 +1076,7 @@ hppa*-*-openbsd*)
target_cpu_default="MASK_PA_11"
tm_file="${tm_file} dbxelf.h elfos.h openbsd.h openbsd-stdint.h openbsd-libpthread.h \
pa/pa-openbsd.h pa/pa32-regs.h pa/pa32-openbsd.h"
+ tmake_file="${tmake_file} pa/t-openbsd"
extra_options="${extra_options} openbsd.opt"
gas=yes
gnu_ld=yes
@@ -1399,8 +1268,7 @@ i[34567]86-*-linux* | i[34567]86-*-kfreebsd*-gnu | i[34567]86-*-knetbsd*-gnu | i
tm_file="${tm_file} i386/unix.h i386/att.h dbxelf.h elfos.h gnu-user.h glibc-stdint.h"
case ${target} in
i[34567]86-*-linux*)
- tm_file="${tm_file} linux.h linux-android.h"
- extra_options="${extra_options} linux-android.opt"
+ tm_file="${tm_file} linux.h"
# Assume modern glibc
default_gnu_indirect_function=yes
if test x$enable_targets = xall; then
@@ -1424,21 +1292,20 @@ i[34567]86-*-linux* | i[34567]86-*-kfreebsd*-gnu | i[34567]86-*-knetbsd*-gnu | i
done
TM_MULTILIB_CONFIG=`echo $TM_MULTILIB_CONFIG | sed 's/^,//'`
need_64bit_isa=yes
- if test x$with_cpu = x; then
+ case X"${with_cpu}" in
+ Xgeneric|Xatom|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver3|Xbdver2|Xbdver1|Xbtver2|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
+ ;;
+ X)
if test x$with_cpu_64 = x; then
with_cpu_64=generic
fi
- else
- case " $x86_cpus $x86_archs $x86_64_archs " in
- *" $with_cpu "*)
- ;;
- *)
- echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
- echo "$x86_cpus $x86_archs $x86_64_archs " 1>&2
- exit 1
- ;;
- esac
- fi
+ ;;
+ *)
+ echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
+ echo "generic atom core2 corei7 corei7-avx nocona x86-64 bdver3 bdver2 bdver1 btver2 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
+ exit 1
+ ;;
+ esac
else
tm_file="${tm_file} i386/gnu-user-common.h i386/gnu-user.h i386/linux-common.h i386/linux.h"
fi
@@ -1462,8 +1329,7 @@ x86_64-*-linux* | x86_64-*-kfreebsd*-gnu | x86_64-*-knetbsd*-gnu)
i386/x86-64.h i386/gnu-user-common.h i386/gnu-user64.h"
case ${target} in
x86_64-*-linux*)
- tm_file="${tm_file} linux.h linux-android.h i386/linux-common.h i386/linux64.h"
- extra_options="${extra_options} linux-android.opt"
+ tm_file="${tm_file} linux.h i386/linux-common.h i386/linux64.h"
# Assume modern glibc
default_gnu_indirect_function=yes
;;
@@ -1525,7 +1391,7 @@ i[34567]86-*-nto-qnx*)
;;
i[34567]86-*-rtems*)
tm_file="${tm_file} i386/unix.h i386/att.h dbxelf.h elfos.h i386/i386elf.h i386/rtemself.h rtems.h newlib-stdint.h"
- tmake_file="${tmake_file} i386/t-rtems"
+ tmake_file="${tmake_file} i386/t-rtems t-rtems"
;;
i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*)
tm_file="${tm_file} i386/unix.h i386/att.h ${sol2_tm_file}"
@@ -1542,29 +1408,25 @@ i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*)
esac
with_tune_32=${with_tune_32:-generic}
case ${target} in
- *-*-solaris2.9*)
- tm_file="${tm_file} i386/sol2-9.h"
- ;;
*-*-solaris2.1[0-9]*)
tm_file="${tm_file} i386/x86-64.h i386/sol2-bi.h sol2-bi.h"
tm_defines="${tm_defines} TARGET_BI_ARCH=1"
tmake_file="$tmake_file i386/t-sol2-64"
need_64bit_isa=yes
- if test x$with_cpu = x; then
+ case X"${with_cpu}" in
+ Xgeneric|Xatom|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver3|Xbdver2|Xbdver1|Xbtver2|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
+ ;;
+ X)
if test x$with_cpu_64 = x; then
with_cpu_64=generic
fi
- else
- case " $x86_cpus $x86_archs $x86_64_archs " in
- *" $with_cpu "*)
- ;;
- *)
- echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
- echo "$x86_cpus $x86_archs $x86_64_archs" 1>&2
- exit 1
- ;;
- esac
- fi
+ ;;
+ *)
+ echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
+ echo "generic atom core2 corei7 corei7-avx nocona x86-64 bdver3 bdver2 bdver1 btver2 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
+ exit 1
+ ;;
+ esac
;;
esac
;;
@@ -1595,28 +1457,9 @@ i[34567]86-*-cygwin*)
fi
use_gcc_stdint=wrap
;;
-x86_64-*-cygwin*)
- need_64bit_isa=yes
- tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h dbxcoff.h i386/cygming.h i386/cygwin.h i386/cygwin-w64.h i386/cygwin-stdint.h"
- xm_file=i386/xm-cygwin.h
- tmake_file="${tmake_file} i386/t-cygming t-slibgcc i386/t-cygwin-w64"
- target_gtfiles="\$(srcdir)/config/i386/winnt.c"
- extra_options="${extra_options} i386/cygming.opt"
- extra_objs="winnt.o winnt-stubs.o"
- c_target_objs="${c_target_objs} msformat-c.o"
- cxx_target_objs="${cxx_target_objs} winnt-cxx.o msformat-c.o"
- if test x$enable_threads = xyes; then
- thread_file='posix'
- fi
- use_gcc_stdint=wrap
- tm_defines="${tm_defines} TARGET_CYGWIN64=1"
- ;;
i[34567]86-*-mingw* | x86_64-*-mingw*)
tm_file="${tm_file} i386/unix.h i386/bsd.h i386/gas.h dbxcoff.h i386/cygming.h"
xm_file=i386/xm-mingw32.h
- c_target_objs="${c_target_objs} winnt-c.o"
- cxx_target_objs="${cxx_target_objs} winnt-c.o"
- target_has_targetcm="yes"
case ${target} in
x86_64-*-* | *-w64-*)
need_64bit_isa=yes
@@ -1636,28 +1479,27 @@ i[34567]86-*-mingw* | x86_64-*-mingw*)
tm_file="${tm_file} i386/mingw-w64.h"
if test x$enable_targets = xall; then
tm_defines="${tm_defines} TARGET_BI_ARCH=1"
- if test x$with_cpu = x; then
+ case X"${with_cpu}" in
+ Xgeneric|Xatom|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver3|Xbdver2|Xbdver1|Xbtver2|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
+ ;;
+ X)
if test x$with_cpu_64 = x; then
with_cpu_64=generic
fi
- else
- case " $x86_cpus $x86_archs $x86_64_archs " in
- *" $with_cpu "*)
- ;;
- *)
- echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
- echo "$x86_cpus $x86_archs $x86_64_archs" 1>&2
- exit 1
- ;;
- esac
- fi
+ ;;
+ *)
+ echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
+ echo "generic atom core2 corei7 Xcorei7-avx nocona x86-64 bdver3 bdver2 bdver1 btver2 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
+ exit 1
+ ;;
+ esac
fi
;;
*)
;;
esac
tm_file="${tm_file} i386/mingw-stdint.h"
- tmake_file="${tmake_file} t-winnt i386/t-cygming t-slibgcc"
+ tmake_file="${tmake_file} i386/t-cygming t-slibgcc"
case ${target} in
x86_64-w64-*)
tmake_file="${tmake_file} i386/t-mingw-w64"
@@ -1778,6 +1620,7 @@ lm32-*-elf*)
lm32-*-rtems*)
tm_file="dbxelf.h elfos.h ${tm_file} lm32/rtems.h rtems.h newlib-stdint.h"
tmake_file="${tmake_file} lm32/t-lm32"
+ tmake_file="${tmake_file} t-rtems"
tmake_file="${tmake_file} lm32/t-rtems"
;;
lm32-*-uclinux*)
@@ -1792,11 +1635,12 @@ m32rle-*-elf*)
;;
m32r-*-rtems*)
tm_file="dbxelf.h elfos.h ${tm_file} m32r/rtems.h rtems.h newlib-stdint.h"
- tmake_file="${tmake_file} m32r/t-m32r"
+ tmake_file="m32r/t-m32r t-rtems"
;;
m32r-*-linux*)
tm_file="dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h ${tm_file} m32r/linux.h"
- tmake_file="${tmake_file} m32r/t-linux t-slibgcc"
+ # We override the tmake_file for linux -- why?
+ tmake_file="m32r/t-linux t-slibgcc"
gnu_ld=yes
if test x$enable_threads = xyes; then
thread_file='posix'
@@ -1804,7 +1648,8 @@ m32r-*-linux*)
;;
m32rle-*-linux*)
tm_file="dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h m32r/little.h ${tm_file} m32r/linux.h"
- tmake_file="${tmake_file} m32r/t-linux t-slibgcc"
+ # We override the tmake_file for linux -- why?
+ tmake_file="m32r/t-linux t-slibgcc"
gnu_ld=yes
if test x$enable_threads = xyes; then
thread_file='posix'
@@ -1883,7 +1728,7 @@ m68k-*-linux*) # Motorola m68k's running GNU/Linux
m68k-*-rtems*)
default_m68k_cpu=68020
default_cf_cpu=5206
- tmake_file="${tmake_file} m68k/t-floatlib m68k/t-m68kbare m68k/t-crtstuff m68k/t-rtems m68k/t-mlibs"
+ tmake_file="m68k/t-floatlib m68k/t-m68kbare m68k/t-crtstuff t-rtems m68k/t-rtems m68k/t-mlibs"
tm_file="${tm_file} m68k/m68k-none.h m68k/m68kelf.h dbxelf.h elfos.h m68k/m68kemb.h m68k/m68020-elf.h m68k/rtemself.h rtems.h newlib-stdint.h"
tm_defines="${tm_defines} MOTOROLA=1"
;;
@@ -1933,7 +1778,7 @@ microblaze*-*-rtems*)
c_target_objs="${c_target_objs} microblaze-c.o"
cxx_target_objs="${cxx_target_objs} microblaze-c.o"
tmake_file="${tmake_file} microblaze/t-microblaze"
- tmake_file="${tmake_file} microblaze/t-rtems"
+ tmake_file="${tmake_file} t-rtems microblaze/t-rtems"
;;
microblaze*-*-elf)
case $target in
@@ -1955,16 +1800,15 @@ mips*-*-netbsd*) # NetBSD/mips, either endian.
extra_options="${extra_options} netbsd.opt netbsd-elf.opt"
;;
mips*-mti-linux*)
- tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h ${tm_file} mips/gnu-user.h mips/gnu-user64.h mips/linux64.h mips/linux-common.h mips/mti-linux.h"
- extra_options="${extra_options} linux-android.opt"
+ tm_file="dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h ${tm_file} mips/gnu-user.h mips/gnu-user64.h mips/linux64.h mips/linux-common.h mips/mti-linux.h"
tmake_file="${tmake_file} mips/t-mti-linux"
tm_defines="${tm_defines} MIPS_ISA_DEFAULT=33 MIPS_ABI_DEFAULT=ABI_32"
gnu_ld=yes
gas=yes
+ test x$with_llsc != x || with_llsc=yes
;;
mips64*-*-linux* | mipsisa64*-*-linux*)
- tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h ${tm_file} mips/gnu-user.h mips/gnu-user64.h mips/linux64.h mips/linux-common.h"
- extra_options="${extra_options} linux-android.opt"
+ tm_file="dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h ${tm_file} mips/gnu-user.h mips/gnu-user64.h mips/linux64.h mips/linux-common.h"
tmake_file="${tmake_file} mips/t-linux64"
tm_defines="${tm_defines} MIPS_ABI_DEFAULT=ABI_N32"
case ${target} in
@@ -1982,10 +1826,10 @@ mips64*-*-linux* | mipsisa64*-*-linux*)
esac
gnu_ld=yes
gas=yes
+ test x$with_llsc != x || with_llsc=yes
;;
mips*-*-linux*) # Linux MIPS, either endian.
- tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h ${tm_file} mips/gnu-user.h mips/linux.h"
- extra_options="${extra_options} linux-android.opt"
+ tm_file="dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h ${tm_file} mips/gnu-user.h mips/linux.h"
if test x$enable_targets = xall; then
tm_file="${tm_file} mips/gnu-user64.h mips/linux64.h"
tmake_file="${tmake_file} mips/t-linux64"
@@ -1998,14 +1842,15 @@ mips*-*-linux*) # Linux MIPS, either endian.
mipsisa32*)
tm_defines="${tm_defines} MIPS_ISA_DEFAULT=32"
esac
+ test x$with_llsc != x || with_llsc=yes
;;
mips*-mti-elf*)
- tm_file="elfos.h newlib-stdint.h ${tm_file} mips/elf.h mips/n32-elf.h mips/sde.h mips/mti-elf.h"
+ tm_file="elfos.h newlib-stdint.h ${tm_file} mips/elf.h mips/sde.h mips/mti-elf.h"
tmake_file="mips/t-mti-elf"
tm_defines="${tm_defines} MIPS_ISA_DEFAULT=33 MIPS_ABI_DEFAULT=ABI_32"
;;
mips*-sde-elf*)
- tm_file="elfos.h newlib-stdint.h ${tm_file} mips/elf.h mips/n32-elf.h mips/sde.h"
+ tm_file="elfos.h newlib-stdint.h ${tm_file} mips/elf.h mips/sde.h"
tmake_file="mips/t-sde"
extra_options="${extra_options} mips/sde.opt"
case "${with_newlib}" in
@@ -2075,25 +1920,23 @@ mipsisa64r2-*-elf* | mipsisa64r2el-*-elf*)
mipsisa64sr71k-*-elf*)
tm_file="elfos.h newlib-stdint.h ${tm_file} mips/elf.h"
tmake_file=mips/t-sr71k
+ target_cpu_default="MASK_64BIT|MASK_FLOAT64"
tm_defines="${tm_defines} MIPS_ISA_DEFAULT=64 MIPS_CPU_STRING_DEFAULT=\\\"sr71000\\\" MIPS_ABI_DEFAULT=ABI_EABI"
;;
mipsisa64sb1-*-elf* | mipsisa64sb1el-*-elf*)
tm_file="elfos.h newlib-stdint.h ${tm_file} mips/elf.h"
tmake_file="mips/t-elf mips/t-sb1"
+ target_cpu_default="MASK_64BIT|MASK_FLOAT64"
tm_defines="${tm_defines} MIPS_ISA_DEFAULT=64 MIPS_CPU_STRING_DEFAULT=\\\"sb1\\\" MIPS_ABI_DEFAULT=ABI_O64"
;;
-mips-*-elf* | mipsel-*-elf* | mipsr5900-*-elf* | mipsr5900el-*-elf*)
+mips-*-elf* | mipsel-*-elf*)
tm_file="elfos.h newlib-stdint.h ${tm_file} mips/elf.h"
tmake_file="mips/t-elf"
;;
-mips64r5900-*-elf* | mips64r5900el-*-elf*)
- tm_file="elfos.h newlib-stdint.h ${tm_file} mips/elf.h mips/n32-elf.h"
- tmake_file="mips/t-elf"
- tm_defines="${tm_defines} MIPS_ISA_DEFAULT=3 MIPS_ABI_DEFAULT=ABI_N32"
- ;;
mips64-*-elf* | mips64el-*-elf*)
tm_file="elfos.h newlib-stdint.h ${tm_file} mips/elf.h"
tmake_file="mips/t-elf"
+ target_cpu_default="MASK_64BIT|MASK_FLOAT64"
tm_defines="${tm_defines} MIPS_ISA_DEFAULT=3 MIPS_ABI_DEFAULT=ABI_O64"
;;
mips64vr-*-elf* | mips64vrel-*-elf*)
@@ -2104,11 +1947,12 @@ mips64vr-*-elf* | mips64vrel-*-elf*)
mips64orion-*-elf* | mips64orionel-*-elf*)
tm_file="elfos.h newlib-stdint.h ${tm_file} mips/elforion.h mips/elf.h"
tmake_file="mips/t-elf"
+ target_cpu_default="MASK_64BIT|MASK_FLOAT64"
tm_defines="${tm_defines} MIPS_ISA_DEFAULT=3 MIPS_ABI_DEFAULT=ABI_O64"
;;
mips*-*-rtems*)
tm_file="elfos.h newlib-stdint.h ${tm_file} mips/elf.h mips/rtems.h rtems.h"
- tmake_file="${tmake_file} mips/t-elf mips/t-rtems"
+ tmake_file="mips/t-elf t-rtems mips/t-rtems"
;;
mips-wrs-vxworks)
tm_file="elfos.h ${tm_file} mips/elf.h vx-common.h vxworks.h mips/vxworks.h"
@@ -2132,40 +1976,11 @@ mn10300-*-*)
use_collect2=no
use_gcc_stdint=wrap
;;
-msp430*-*-*)
- tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}"
- c_target_objs="msp430-c.o"
- cxx_target_objs="msp430-c.o"
- tmake_file="${tmake_file} msp430/t-msp430"
- ;;
-nds32le-*-*)
- target_cpu_default="0"
- tm_defines="${tm_defines}"
- tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}"
- tmake_file="nds32/t-mlibs"
- ;;
-nds32be-*-*)
- target_cpu_default="0|MASK_BIG_ENDIAN"
- tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1"
+negrocore-*-elf)
+ gas=yes
+ gnu_ld=yes
tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}"
- tmake_file="nds32/t-mlibs"
- ;;
-nios2-*-*)
- tm_file="elfos.h ${tm_file}"
- tmake_file="${tmake_file} nios2/t-nios2"
- case ${target} in
- nios2-*-linux*)
- tm_file="${tm_file} gnu-user.h linux.h glibc-stdint.h nios2/linux.h "
- ;;
- nios2-*-elf*)
- tm_file="${tm_file} newlib-stdint.h nios2/elf.h"
- extra_options="${extra_options} nios2/elf.opt"
- ;;
- nios2-*-rtems*)
- tm_file="${tm_file} newlib-stdint.h nios2/rtems.h rtems.h"
- tmake_file="${tmake_file} t-rtems nios2/t-rtems"
- ;;
- esac
+ tmake_file="${tmake_file} negrocore/t-negrocore"
;;
pdp11-*-*)
tm_file="${tm_file} newlib-stdint.h"
@@ -2268,13 +2083,12 @@ powerpc-*-eabi*)
powerpc-*-rtems*)
tm_file="${tm_file} dbxelf.h elfos.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h rs6000/rtems.h rtems.h"
extra_options="${extra_options} rs6000/sysv4.opt"
- tmake_file="${tmake_file} rs6000/t-fprules rs6000/t-rtems rs6000/t-ppccomm"
+ tmake_file="rs6000/t-fprules rs6000/t-rtems t-rtems rs6000/t-ppccomm"
;;
powerpc*-*-linux*)
tm_file="${tm_file} dbxelf.h elfos.h freebsd-spec.h rs6000/sysv4.h"
extra_options="${extra_options} rs6000/sysv4.opt"
tmake_file="rs6000/t-fprules rs6000/t-ppcos ${tmake_file} rs6000/t-ppccomm"
- extra_objs="$extra_objs rs6000-linux.o"
case ${target} in
powerpc*le-*-*)
tm_file="${tm_file} rs6000/sysv4le.h" ;;
@@ -2442,7 +2256,7 @@ s390-*-linux*)
s390x-*-linux*)
default_gnu_indirect_function=yes
tm_file="s390/s390x.h s390/s390.h dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h s390/linux.h"
- tm_p_file="linux-protos.h s390/s390-protos.h"
+ tm_p_file=s390/s390-protos.h
md_file=s390/s390.md
extra_modes=s390/s390-modes.def
out_file=s390/s390.c
@@ -2639,7 +2453,7 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
tmake_file="$tmake_file t-sysroot-suffix"
;;
sh-*-rtems*)
- tmake_file="${tmake_file} sh/t-sh sh/t-rtems"
+ tmake_file="sh/t-sh t-rtems sh/t-rtems"
tm_file="${tm_file} dbxelf.h elfos.h sh/elf.h sh/embed-elf.h sh/rtemself.h rtems.h newlib-stdint.h"
;;
sh-wrs-vxworks)
@@ -2662,7 +2476,7 @@ sparc-*-elf*)
;;
sparc-*-rtems*)
tm_file="${tm_file} dbxelf.h elfos.h sparc/sysv4.h sparc/sp-elf.h sparc/rtemself.h rtems.h newlib-stdint.h"
- tmake_file="${tmake_file} sparc/t-sparc sparc/t-elf sparc/t-rtems"
+ tmake_file="sparc/t-sparc sparc/t-rtems t-rtems"
;;
sparc-*-linux*)
tm_file="${tm_file} dbxelf.h elfos.h sparc/sysv4.h gnu-user.h linux.h glibc-stdint.h sparc/tso.h"
@@ -2716,7 +2530,7 @@ sparc64-*-elf*)
sparc64-*-rtems*)
tm_file="${tm_file} dbxelf.h elfos.h newlib-stdint.h sparc/sysv4.h sparc/sp64-elf.h sparc/rtemself.h rtems.h"
extra_options="${extra_options}"
- tmake_file="${tmake_file} sparc/t-sparc sparc/t-rtems-64"
+ tmake_file="${tmake_file} sparc/t-sparc sparc/t-rtems-64 t-rtems"
;;
sparc64-*-linux*)
tm_file="sparc/biarch64.h ${tm_file} dbxelf.h elfos.h sparc/sysv4.h gnu-user.h linux.h glibc-stdint.h sparc/default-64.h sparc/linux64.h sparc/tso.h"
@@ -2772,23 +2586,18 @@ tic6x-*-uclinux)
tmake_file="${tmake_file} c6x/t-c6x c6x/t-c6x-elf c6x/t-c6x-uclinux"
use_collect2=no
;;
-tilegx*-*-linux*)
+tilegx-*-linux*)
tm_file="elfos.h gnu-user.h linux.h glibc-stdint.h tilegx/linux.h ${tm_file}"
tmake_file="${tmake_file} tilegx/t-tilegx"
- extra_objs="${extra_objs} mul-tables.o"
+ extra_objs="mul-tables.o"
c_target_objs="${c_target_objs} tilegx-c.o"
cxx_target_objs="${cxx_target_objs} tilegx-c.o"
extra_headers="feedback.h"
- case $target in
- tilegxbe-*)
- tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1"
- ;;
- esac
;;
-tilepro*-*-linux*)
+tilepro-*-linux*)
tm_file="elfos.h gnu-user.h linux.h glibc-stdint.h tilepro/linux.h ${tm_file}"
tmake_file="${tmake_file} tilepro/t-tilepro"
- extra_objs="${extra_objs} mul-tables.o"
+ extra_objs="mul-tables.o"
c_target_objs="${c_target_objs} tilepro-c.o"
cxx_target_objs="${cxx_target_objs} tilepro-c.o"
extra_headers="feedback.h"
@@ -2798,7 +2607,7 @@ v850-*-rtems*)
tm_file="dbxelf.h elfos.h v850/v850.h"
tm_file="${tm_file} rtems.h v850/rtems.h newlib-stdint.h"
tmake_file="${tmake_file} v850/t-v850"
- tmake_file="${tmake_file} v850/t-rtems"
+ tmake_file="${tmake_file} t-rtems v850/t-rtems"
use_collect2=no
c_target_objs="v850-c.o"
cxx_target_objs="v850-c.o"
@@ -2871,6 +2680,7 @@ am33_2.0-*-linux*)
;;
m32c-*-rtems*)
tm_file="dbxelf.h elfos.h ${tm_file} m32c/rtems.h rtems.h newlib-stdint.h"
+ tmake_file="${tmake_file} t-rtems"
c_target_objs="m32c-pragma.o"
cxx_target_objs="m32c-pragma.o"
;;
@@ -2975,10 +2785,6 @@ case ${target} in
;;
i686-*-* | i786-*-*)
case ${target_noncanonical} in
- bdver4-*)
- arch=bdver4
- cpu=bdver4
- ;;
bdver3-*)
arch=bdver3
cpu=bdver3
@@ -3053,10 +2859,6 @@ case ${target} in
arch=atom
cpu=atom
;;
- slm-*)
- arch=slm
- cpu=slm
- ;;
core2-*)
arch=core2
cpu=core2
@@ -3088,10 +2890,6 @@ case ${target} in
;;
x86_64-*-*)
case ${target_noncanonical} in
- bdver4-*)
- arch=bdver4
- cpu=bdver4
- ;;
bdver3-*)
arch=bdver3
cpu=bdver3
@@ -3132,10 +2930,6 @@ case ${target} in
arch=atom
cpu=atom
;;
- slm-*)
- arch=slm
- cpu=slm
- ;;
core2-*)
arch=core2
cpu=core2
@@ -3190,6 +2984,9 @@ if test x$with_cpu = x ; then
;;
esac
;;
+ mips*-*-vxworks)
+ with_arch=mips2
+ ;;
powerpc*-*-*spe*)
if test x$enable_e500_double = xyes; then
with_cpu=8548
@@ -3205,6 +3002,9 @@ if test x$with_cpu = x ; then
*-leon[3-9]*)
with_cpu=leon3
;;
+ *-leon[3-9]v7*)
+ with_cpu=leon3v7
+ ;;
*)
with_cpu="`echo ${target} | sed 's/-.*$//'`"
;;
@@ -3257,12 +3057,6 @@ if test x$with_arch = x ; then
x86_64-*-*)
with_arch=$arch
;;
- mips64r5900-*-* | mips64r5900el-*-* | mipsr5900-*-* | mipsr5900el-*-*)
- with_arch=r5900
- ;;
- mips*-*-vxworks)
- with_arch=mips2
- ;;
esac
# Avoid overriding --with-arch-32 and --with-arch-64 values.
@@ -3297,27 +3091,6 @@ if test x$with_arch = x ; then
esac
fi
-# Infer a default setting for --with-float.
-if test x$with_float = x; then
- case ${target} in
- mips64r5900-*-* | mips64r5900el-*-* | mipsr5900-*-* | mipsr5900el-*-*)
- # The R5900 doesn't support 64-bit float. 32-bit float doesn't
- # comply with IEEE 754.
- with_float=soft
- ;;
- esac
-fi
-
-# Infer a default setting for --with-fpu.
-if test x$with_fpu = x; then
- case ${target} in
- mips64r5900-*-* | mips64r5900el-*-* | mipsr5900-*-* | mipsr5900el-*-*)
- # The R5900 FPU only supports single precision.
- with_fpu=single
- ;;
- esac
-fi
-
# Support --with-fpmath.
if test x$with_fpmath != x; then
case ${target} in
@@ -3352,20 +3125,6 @@ if test x$with_schedule = x; then
esac
fi
-# Infer a default setting for --with-llsc.
-if test x$with_llsc = x; then
- case ${target} in
- mips64r5900-*-* | mips64r5900el-*-* | mipsr5900-*-* | mipsr5900el-*-*)
- # The R5900 doesn't support LL(D) and SC(D).
- with_llsc=no
- ;;
- mips*-*-linux*)
- # The kernel emulates LL and SC where necessary.
- with_llsc=yes
- ;;
- esac
-fi
-
# Validate and mark as valid any --with options supported
# by this target. In order to use a particular --with option
# you must list it in supported_defaults; validating the value
@@ -3375,7 +3134,7 @@ fi
supported_defaults=
case "${target}" in
aarch64*-*-*)
- supported_defaults="abi cpu arch"
+ supported_defaults="cpu arch"
for which in cpu arch; do
eval "val=\$with_$which"
@@ -3483,17 +3242,6 @@ case "${target}" in
done
;;
- arc*-*-*) # was: arc*-*-linux-uclibc)
- supported_defaults="cpu"
- case $with_cpu in
- arc600|arc601|arc700)
- ;;
- *) echo "Unknown cpu type"
- exit 1
- ;;
- esac
- ;;
-
arm*-*-*)
supported_defaults="arch cpu float tune fpu abi mode tls"
for which in cpu tune; do
@@ -3517,17 +3265,19 @@ case "${target}" in
fi
done
- # See if it matches any of the entries in arm-arches.def
- if [ x"$with_arch" = x ] \
- || grep "^ARM_ARCH(\"$with_arch\"," \
- ${srcdir}/config/arm/arm-arches.def \
- > /dev/null; then
- # OK
- true
- else
- echo "Unknown arch used in --with-arch=$with_arch" 1>&2
- exit 1
- fi
+ case "$with_arch" in
+ "" \
+ | armv[23456] | armv2a | armv3m | armv4t | armv5t \
+ | armv5te | armv6j |armv6k | armv6z | armv6zk | armv6-m \
+ | armv7 | armv7-a | armv7-r | armv7-m | armv8-a \
+ | iwmmxt | ep9312)
+ # OK
+ ;;
+ *)
+ echo "Unknown arch used in --with-arch=$with_arch" 1>&2
+ exit 1
+ ;;
+ esac
case "$with_float" in
"" \
@@ -3540,17 +3290,20 @@ case "${target}" in
;;
esac
- # see if it matches any of the entries in arm-fpus.def
- if [ x"$with_fpu" = x ] \
- || grep "^ARM_FPU(\"$with_fpu\"," \
- ${srcdir}/config/arm/arm-fpus.def \
- > /dev/null; then
- # OK
- true
- else
- echo "Unknown fpu used in --with-fpu=$with_fpu" 1>&2
- exit 1
- fi
+ case "$with_fpu" in
+ "" \
+ | vfp | vfp3 | vfpv3 \
+ | vfpv3-fp16 | vfpv3-d16 | vfpv3-d16-fp16 | vfpv3xd \
+ | vfpv3xd-fp16 | neon | neon-fp16 | vfpv4 | vfpv4-d16 \
+ | fpv4-sp-d16 | neon-vfpv4 | fp-arm-v8 | neon-fp-armv8 \
+ | crypto-neon-fp-armv8)
+ # OK
+ ;;
+ *)
+ echo "Unknown fpu used in --with-fpu=$with_fpu" 2>&1
+ exit 1
+ ;;
+ esac
case "$with_abi" in
"" \
@@ -3588,43 +3341,6 @@ case "${target}" in
if test "x$with_arch" != x && test "x$with_cpu" != x; then
echo "Warning: --with-arch overrides --with-cpu=$with_cpu" 1>&2
fi
-
- # Add extra multilibs
- if test "x$with_multilib_list" != x; then
- arm_multilibs=`echo $with_multilib_list | sed -e 's/,/ /g'`
- for arm_multilib in ${arm_multilibs}; do
- case ${arm_multilib} in
- aprofile)
- # Note that arm/t-aprofile is a
- # stand-alone make file fragment to be
- # used only with itself. We do not
- # specifically use the
- # TM_MULTILIB_OPTION framework because
- # this shorthand is more
- # pragmatic. Additionally it is only
- # designed to work without any
- # with-cpu, with-arch with-mode
- # with-fpu or with-float options.
- if test "x$with_arch" != x \
- || test "x$with_cpu" != x \
- || test "x$with_float" != x \
- || test "x$with_fpu" != x \
- || test "x$with_mode" != x ; then
- echo "Error: You cannot use any of --with-arch/cpu/fpu/float/mode with --with-multilib-list=aprofile" 1>&2
- exit 1
- fi
- tmake_file="${tmake_file} arm/t-aprofile"
- break
- ;;
- default)
- ;;
- *)
- echo "Error: --with-multilib-list=${with_multilib_list} not supported." 1>&2
- exit 1
- ;;
- esac
- done
- fi
;;
fr*-*-*linux*)
@@ -3707,8 +3423,13 @@ case "${target}" in
supported_defaults="abi arch arch_32 arch_64 cpu cpu_32 cpu_64 tune tune_32 tune_64"
for which in arch arch_32 arch_64 cpu cpu_32 cpu_64 tune tune_32 tune_64; do
eval "val=\$with_$which"
- case " $x86_archs " in
- *" ${val} "*)
+ case ${val} in
+ i386 | i486 \
+ | i586 | pentium | pentium-mmx | winchip-c6 | winchip2 \
+ | c3 | c3-2 | i686 | pentiumpro | pentium2 | pentium3 \
+ | pentium4 | k6 | k6-2 | k6-3 | athlon | athlon-tbird \
+ | athlon-4 | athlon-xp | athlon-mp | geode \
+ | prescott | pentium-m | pentium4m | pentium3m)
case "${target}" in
x86_64-*-*)
case "x$which" in
@@ -3723,41 +3444,23 @@ case "${target}" in
esac
# OK
;;
+ "" | x86-64 | generic | native \
+ | k8 | k8-sse3 | athlon64 | athlon64-sse3 | opteron \
+ | opteron-sse3 | athlon-fx | bdver3 | bdver2 | bdver1 | btver2 \
+ | btver1 | amdfam10 | barcelona | nocona | core2 | corei7 \
+ | corei7-avx | core-avx-i | core-avx2 | atom)
+ # OK
+ ;;
*)
- if test x${val} != x; then
- case " $x86_64_archs " in
- *" ${val} "*)
- # OK
- ;;
- *)
- # Allow $x86_cpus --with-cpu=/--with-tune=
- case "x$which" in
- xcpu*|xtune*)
- case " $x86_cpus " in
- *" ${val} "*)
- # OK
- ;;
- *)
- echo "Unknown CPU given in --with-$which=$val." 1>&2
- exit 1
- ;;
- esac
- ;;
- *)
- echo "Unknown CPU given in --with-$which=$val." 1>&2
- exit 1
- ;;
- esac
- ;;
- esac
- fi
+ echo "Unknown CPU given in --with-$which=$val." 1>&2
+ exit 1
;;
esac
done
;;
mips*-*-*)
- supported_defaults="abi arch arch_32 arch_64 float fpu nan tune tune_32 tune_64 divide llsc mips-plt synci"
+ supported_defaults="abi arch arch_32 arch_64 float tune tune_32 tune_64 divide llsc mips-plt synci"
case ${with_float} in
"" | soft | hard)
@@ -3769,26 +3472,6 @@ case "${target}" in
;;
esac
- case ${with_fpu} in
- "" | single | double)
- # OK
- ;;
- *)
- echo "Unknown fpu type used in --with-fpu=$with_fpu" 1>&2
- exit 1
- ;;
- esac
-
- case ${with_nan} in
- "" | 2008 | legacy)
- # OK
- ;;
- *)
- echo "Unknown NaN encoding used in --with-nan=$with_nan" 1>&2
- exit 1
- ;;
- esac
-
case ${with_abi} in
"" | 32 | o64 | n32 | 64 | eabi)
# OK
@@ -3856,39 +3539,6 @@ case "${target}" in
esac
;;
- nds32*-*-*)
- supported_defaults="arch nds32_lib"
-
- # process --with-arch
- case "${with_arch}" in
- "" | v2 | v3 | v3m)
- # OK
- ;;
- *)
- echo "Cannot accept --with-arch=$with_arch, available values are: v2 v3 v3m" 1>&2
- exit 1
- ;;
- esac
-
- # process --with-nds32-lib
- case "${with_nds32_lib}" in
- "")
- # the default library is newlib
- with_nds32_lib=newlib
- ;;
- newlib)
- # OK
- ;;
- mculib)
- # OK
- ;;
- *)
- echo "Cannot accept --with-nds32-lib=$with_nds32_lib, available values are: newlib mculib" 1>&2
- exit 1
- ;;
- esac
- ;;
-
powerpc*-*-* | rs6000-*-*)
supported_defaults="abi cpu cpu_32 cpu_64 float tune tune_32 tune_64"
@@ -3911,7 +3561,7 @@ case "${target}" in
tm_defines="${tm_defines} CONFIG_PPC405CR"
eval "with_$which=405"
;;
- "" | common | native \
+ "" | common \
| power | power[2345678] | power6x | powerpc | powerpc64 \
| rios | rios1 | rios2 | rsc | rsc1 | rs64a \
| 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \
@@ -3993,7 +3643,7 @@ case "${target}" in
case ${val} in
"" | sparc | sparcv9 | sparc64 \
| v7 | cypress \
- | v8 | supersparc | hypersparc | leon | leon3 \
+ | v8 | supersparc | hypersparc | leon | leon3 | leon3v7 \
| sparclite | f930 | f934 | sparclite86x \
| sparclet | tsc701 \
| v9 | ultrasparc | ultrasparc3 | niagara | niagara2 \
@@ -4083,9 +3733,10 @@ case ${target} in
;;
hppa*-*-*)
+ target_cpu_default2="MASK_BIG_SWITCH"
if test x$gas = xyes
then
- target_cpu_default2="MASK_GAS|MASK_JUMP_IN_DELAY"
+ target_cpu_default2="${target_cpu_default2}|MASK_GAS|MASK_JUMP_IN_DELAY"
fi
;;
@@ -4110,9 +3761,7 @@ case ${target} in
;;
i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*)
;;
- i[34567]86-*-cygwin* | x86_64-*-cygwin*)
- ;;
- i[34567]86-*-mingw* | x86_64-*-mingw*)
+ i[34567]86-*-cygwin* | i[34567]86-*-mingw* | x86_64-*-mingw*)
;;
i[34567]86-*-freebsd* | x86_64-*-freebsd*)
;;
@@ -4191,7 +3840,7 @@ case ${target} in
esac
t=
-all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan divide llsc mips-plt synci tls"
+all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu divide llsc mips-plt synci tls"
for option in $all_defaults
do
eval "val=\$with_"`echo $option | sed s/-/_/g`
diff --git a/gcc/config/negrocore/constraints.md b/gcc/config/negrocore/constraints.md
new file mode 100644
index 0000000..2343b3f
--- /dev/null
+++ b/gcc/config/negrocore/constraints.md
@@ -0,0 +1,53 @@
+;; NegroCore Constraint definitions.
+;; Copyright (C) 2015 Free Software Foundation, Inc.
+
+;; GCC is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published
+;; by the Free Software Foundation; either version 3, or (at your
+;; option) any later version.
+
+;; GCC is distributed in the hope that it will be useful, but WITHOUT
+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+;; License for more details.
+
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING3. If not see
+;; <http://www.gnu.org/licenses/>.
+
+;; -------------------------------------------------------------------------
+;; Constraints
+;; -------------------------------------------------------------------------
+
+(define_constraint "W"
+ "Register indirect memory operand."
+ (and (match_code "mem")
+ (match_test "REG_P (XEXP (op, 0)) &&
+ REGNO_OK_FOR_BASE_P (REGNO (XEXP (op, 0)))")))
+
+(define_constraint "O"
+ "Constant zero"
+ (and (match_code "const_int")
+ (match_test "ival == 0")))
+
+(define_constraint "Imm8"
+ "8-bits constant"
+ (and (match_code "const_int")
+ (match_test "(ival >= -128 && ival < 0) ||
+ (ival > 0 && ival <= 255)")))
+
+(define_constraint "Im16"
+ "16-bits constant"
+ (and (match_code "const_int")
+ (match_test "(ival >= -32768 && ival <= -129) ||
+ (ival >= 256 && ival <= 65535)")))
+
+(define_constraint "Im32"
+ "32-bits constant"
+ (and (match_code "const_int")
+ (match_test "(ival >= -2147483648 && ival <= -32769) ||
+ (ival >= 65536 && ival <= 4294967295)")))
+
+(define_constraint "S"
+ "Symbol reference"
+ (match_code "symbol_ref"))
diff --git a/gcc/config/negrocore/negrocore-protos.h b/gcc/config/negrocore/negrocore-protos.h
new file mode 100644
index 0000000..44c9d87
--- /dev/null
+++ b/gcc/config/negrocore/negrocore-protos.h
@@ -0,0 +1,22 @@
+/* Prototypes functions used in the md file & elsewhere.
+ Copyright (C) 2015 Free Software Foundation, Inc.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
+
+extern void negrocore_expand_prologue (void);
+extern void negrocore_expand_epilogue (void);
+extern int negrocore_initial_elimination_offset (int, int);
+extern void negrocore_print_operand (FILE *, rtx, int);
+extern void negrocore_print_operand_address (FILE *, rtx);
diff --git a/gcc/config/negrocore/negrocore.c b/gcc/config/negrocore/negrocore.c
new file mode 100644
index 0000000..df3b36e
--- /dev/null
+++ b/gcc/config/negrocore/negrocore.c
@@ -0,0 +1,352 @@
+/* NegroCore Target Code.
+ Copyright (C) 2015 Free Software Foundation, Inc.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "rtl.h"
+#include "regs.h"
+#include "hard-reg-set.h"
+#include "insn-config.h"
+#include "conditions.h"
+#include "insn-flags.h"
+#include "output.h"
+#include "insn-attr.h"
+#include "flags.h"
+#include "recog.h"
+#include "reload.h"
+#include "diagnostic-core.h"
+#include "obstack.h"
+#include "tree.h"
+#include "stor-layout.h"
+#include "varasm.h"
+#include "calls.h"
+#include "expr.h"
+#include "optabs.h"
+#include "except.h"
+#include "function.h"
+#include "ggc.h"
+#include "target.h"
+#include "target-def.h"
+#include "tm_p.h"
+#include "langhooks.h"
+#include "df.h"
+
+#define LOSE_AND_RETURN(msgid, x) \
+ do \
+ { \
+ negrocore_operand_lossage (msgid, x); \
+ return; \
+ } while (0)
+
+// Worker function for TARGET_RETURN_IN_MEMORY.
+static bool negrocore_return_in_memory (
+ const_tree type,
+ const_tree fntype ATTRIBUTE_UNUSED) {
+
+ const HOST_WIDE_INT size = int_size_in_bytes (type);
+
+ return (size == -1 || size > 2*UNITS_PER_WORD);
+}
+
+// Define how to find the value returned by a function.
+// VALTYPE is the data type of the value (as a tree).
+// If the precise function being called is known,
+// FUNC is its FUNCTION_DECL; otherwise, FUNC is 0.
+// We always return values in register %14 for negrocore.
+static rtx negrocore_function_value (
+ const_tree valtype,
+ const_tree fntype_or_decl ATTRIBUTE_UNUSED,
+ bool outgoing ATTRIBUTE_UNUSED) {
+
+ return gen_rtx_REG (TYPE_MODE(valtype), NEGROCORE_R14);
+}
+
+// Define how to find the value returned by a library function.
+// We always return values in register %14 for negrocore.
+static rtx negrocore_libcall_value (
+ enum machine_mode mode,
+ const_rtx fun ATTRIBUTE_UNUSED) {
+
+ return gen_rtx_REG (mode, NEGROCORE_R14);
+}
+
+// Handle TARGET_FUNCTION_VALUE_REGNO_P.
+// We always return values in register %14 for negrocore.
+static bool negrocore_function_value_regno_p (
+ const unsigned int regno) {
+
+ return (regno == NEGROCORE_R14);
+}
+
+// Emit an error message when we're in an asm,
+// and a fatal error for "normal" insns.
+// Formatted output isn't easily implemented,
+// since we use output_operand_lossage
+// to output the actual message and
+// handle the categorization of the error.
+static void negrocore_operand_lossage (
+ const char *msgid,
+ rtx op) {
+
+ debug_rtx (op);
+
+ output_operand_lossage ("%s", msgid);
+}
+
+// The PRINT_OPERAND_ADDRESS worker.
+void negrocore_print_operand_address (FILE *file, rtx x) {
+
+ switch (GET_CODE (x)) {
+
+ case REG:
+
+ fprintf (file, "%s", reg_names[REGNO (x)]);
+
+ break;
+
+ default:
+
+ output_addr_const (file, x);
+
+ break;
+ }
+}
+
+// The PRINT_OPERAND worker.
+void negrocore_print_operand (FILE *file, rtx x, int code) {
+
+ rtx operand = x;
+
+ /* New code entries should just be added to the switch below.
+ If handling is finished, just return. If handling was just
+ a modification of the operand, the modified operand should be
+ put in "operand", and then do a break to let default handling
+ (zero-modifier) output the operand. */
+
+ switch (code) {
+
+ case 0:
+ // No code, print as usual.
+ break;
+
+ default:
+
+ LOSE_AND_RETURN ("invalid operand modifier letter", x);
+ }
+
+ // Print an operand as without a modifier letter.
+ switch (GET_CODE (operand)) {
+
+ case REG:
+
+ if (REGNO (operand) > NEGROCORE_R15)
+ internal_error ("internal error: bad register: %d",
+ REGNO (operand));
+
+ fprintf (file, "%s", reg_names[REGNO (operand)]);
+
+ return;
+
+ case MEM:
+
+ output_address (XEXP (operand, 0));
+
+ return;
+
+ default:
+ // No need to handle all strange variants,
+ // let output_addr_const do it for us.
+ if (CONSTANT_P (operand)) {
+ output_addr_const (file, operand);
+ return;
+ }
+
+ LOSE_AND_RETURN ("unexpected operand", x);
+ }
+}
+
+// Per-function machine data.
+struct GTY(()) machine_function {
+ // Used in expand_prologue() and expand_epilogue().
+ unsigned size_for_adjusting_sp;
+};
+
+// Zero initialization is OK for all current fields.
+static struct machine_function *negrocore_init_machine_status (void) {
+ return ggc_alloc_cleared_machine_function ();
+}
+
+// The TARGET_OPTION_OVERRIDE worker.
+// All this curently does is set init_machine_status.
+static void negrocore_option_override (void) {
+ // Set the per-function-data initializer.
+ init_machine_status = negrocore_init_machine_status;
+}
+
+// Compute the size of the local area
+// and the size to be adjusted
+// by the prologue and epilogue.
+static void negrocore_compute_frame (void) {
+ // For aligning the local variables.
+ int stack_alignment = STACK_BOUNDARY / BITS_PER_UNIT;
+ int padding_locals;
+
+ // Padding needed for each element of the frame.
+ unsigned local_vars_size = get_frame_size ();
+ // Align to the stack alignment.
+ padding_locals = local_vars_size % stack_alignment;
+ if (padding_locals) padding_locals = stack_alignment - padding_locals;
+ local_vars_size += padding_locals;
+
+ cfun->machine->size_for_adjusting_sp = local_vars_size +
+ (ACCUMULATE_OUTGOING_ARGS ? crtl->outgoing_args_size : 0);
+}
+
+void negrocore_expand_prologue (void) {
+
+ negrocore_compute_frame ();
+
+ if (flag_stack_usage_info)
+ current_function_static_stack_size =
+ cfun->machine->size_for_adjusting_sp;
+
+ if (cfun->machine->size_for_adjusting_sp) {
+
+ rtx insn = emit_insn (
+ gen_subsi3 (
+ stack_pointer_rtx,
+ stack_pointer_rtx,
+ GEN_INT (cfun->machine->size_for_adjusting_sp)));
+
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+}
+
+void negrocore_expand_epilogue (void) {
+
+ if (cfun->machine->size_for_adjusting_sp) {
+
+ rtx insn = emit_insn (
+ gen_addsi3 (
+ stack_pointer_rtx,
+ stack_pointer_rtx,
+ GEN_INT (cfun->machine->size_for_adjusting_sp)));
+
+ RTX_FRAME_RELATED_P (insn) = 1;
+ }
+
+ emit_jump_insn (gen_returner ());
+}
+
+static rtx negrocore_function_arg (
+ cumulative_args_t cum_v,
+ enum machine_mode mode,
+ const_tree type ATTRIBUTE_UNUSED,
+ bool named ATTRIBUTE_UNUSED) {
+
+ return NULL_RTX;
+}
+
+static void negrocore_function_arg_advance (
+ cumulative_args_t cum_v,
+ enum machine_mode mode,
+ const_tree type,
+ bool named ATTRIBUTE_UNUSED) {
+
+ CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
+
+ *cum = *cum;
+}
+
+// TARGET_STATIC_CHAIN worker.
+// TODO: Function to revisit ...
+static rtx negrocore_static_chain (
+ const_tree ARG_UNUSED (fndecl_or_type),
+ bool incoming_p) {
+
+ rtx addr, mem;
+
+ if (incoming_p) addr = plus_constant (Pmode, arg_pointer_rtx, 2*UNITS_PER_WORD);
+ else addr = plus_constant (Pmode, stack_pointer_rtx, -UNITS_PER_WORD);
+
+ mem = gen_rtx_MEM (Pmode, addr);
+ MEM_NOTRAP_P (mem) = 1;
+
+ return mem;
+}
+
+// TARGET_ASM_TRAMPOLINE_TEMPLATE worker.
+// TODO: Function to revisit ...
+static void negrocore_asm_trampoline_template (FILE *f) {
+ fprintf (f, "\tinc %%0, 0 ### trampoline template\n");
+}
+
+// TARGET_TRAMPOLINE_INIT worker.
+// TODO: Function to revisit ...
+static void negrocore_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) {
+
+ rtx mem, fnaddr = XEXP (DECL_RTL (fndecl), 0);
+
+ emit_block_move (m_tramp, assemble_trampoline_template (),
+ GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
+
+ mem = adjust_address (m_tramp, SImode, 4);
+ emit_move_insn (mem, chain_value);
+ mem = adjust_address (m_tramp, SImode, 16);
+ emit_move_insn (mem, fnaddr);
+}
+
+// Initialize the GCC target structure.
+
+#undef TARGET_PROMOTE_PROTOTYPES
+#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
+
+#undef TARGET_RETURN_IN_MEMORY
+#define TARGET_RETURN_IN_MEMORY negrocore_return_in_memory
+#undef TARGET_MUST_PASS_IN_STACK
+#define TARGET_MUST_PASS_IN_STACK must_pass_in_stack_var_size
+
+#undef TARGET_FUNCTION_ARG
+#define TARGET_FUNCTION_ARG negrocore_function_arg
+#undef TARGET_FUNCTION_ARG_ADVANCE
+#define TARGET_FUNCTION_ARG_ADVANCE negrocore_function_arg_advance
+
+/* Define this to return an RTX representing the place where
+a function returns or receives a value of data type RET_TYPE,
+a tree node node representing a data type. */
+#undef TARGET_FUNCTION_VALUE
+#define TARGET_FUNCTION_VALUE negrocore_function_value
+#undef TARGET_LIBCALL_VALUE
+#define TARGET_LIBCALL_VALUE negrocore_libcall_value
+#undef TARGET_FUNCTION_VALUE_REGNO_P
+#define TARGET_FUNCTION_VALUE_REGNO_P negrocore_function_value_regno_p
+
+#undef TARGET_STATIC_CHAIN
+#define TARGET_STATIC_CHAIN negrocore_static_chain
+#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
+#define TARGET_ASM_TRAMPOLINE_TEMPLATE negrocore_asm_trampoline_template
+#undef TARGET_TRAMPOLINE_INIT
+#define TARGET_TRAMPOLINE_INIT negrocore_trampoline_init
+
+#undef TARGET_OPTION_OVERRIDE
+#define TARGET_OPTION_OVERRIDE negrocore_option_override
+
+struct gcc_target targetm = TARGET_INITIALIZER;
+
+#include "gt-negrocore.h"
diff --git a/gcc/config/negrocore/negrocore.h b/gcc/config/negrocore/negrocore.h
new file mode 100644
index 0000000..23a697f
--- /dev/null
+++ b/gcc/config/negrocore/negrocore.h
@@ -0,0 +1,408 @@
+/* NegroCore Target Definitions.
+ Copyright (C) 2015 Free Software Foundation, Inc.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_NEGROCORE_H
+#define GCC_NEGROCORE_H
+
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC "%{!mno-crt0:crt0%O%s} crti.o%s crtbegin.o%s"
+
+#undef ENDFILE_SPEC
+#define ENDFILE_SPEC "crtend.o%s crtn.o%s"
+
+#undef LIB_SPEC
+#define LIB_SPEC "%{!shared:%{!symbolic:-lc}}"
+
+#undef LINK_SPEC
+#define LINK_SPEC "%{h*} %{v:-V} %{static:-Bstatic} %{shared:-shared} %{symbolic:-Bsymbolic}"
+
+// Layout of Source Language Data Types.
+
+#define INT_TYPE_SIZE 32
+#define SHORT_TYPE_SIZE 16
+#define LONG_TYPE_SIZE 32
+#define LONG_LONG_TYPE_SIZE 64
+
+#define FLOAT_TYPE_SIZE 32
+#define DOUBLE_TYPE_SIZE 64
+#define LONG_DOUBLE_TYPE_SIZE 64
+
+#define DEFAULT_SIGNED_CHAR 0
+
+#undef SIZE_TYPE
+#define SIZE_TYPE "unsigned int"
+
+#undef PTRDIFF_TYPE
+#define PTRDIFF_TYPE "int"
+
+#undef WCHAR_TYPE
+#define WCHAR_TYPE "unsigned int"
+
+#undef WCHAR_TYPE_SIZE
+#define WCHAR_TYPE_SIZE BITS_PER_WORD
+
+#define REGISTER_NAMES { \
+ "%0", "%1", "%2", "%3", \
+ "%4", "%5", "%6", "%7", \
+ "%8", "%9", "%10", "%11", \
+ "%12", "%13", "%14", "%15" }
+
+#define NEGROCORE_SP 0
+#define NEGROCORE_R1 1
+#define NEGROCORE_R2 2
+#define NEGROCORE_R3 3
+#define NEGROCORE_R4 4
+#define NEGROCORE_R5 5
+#define NEGROCORE_R6 6
+#define NEGROCORE_R7 7
+#define NEGROCORE_R8 8
+#define NEGROCORE_R9 9
+#define NEGROCORE_R10 10
+#define NEGROCORE_R11 11
+#define NEGROCORE_R12 12
+#define NEGROCORE_R13 13
+#define NEGROCORE_R14 14
+#define NEGROCORE_R15 15
+
+#define FIRST_PSEUDO_REGISTER 16
+
+enum reg_class
+{
+ NO_REGS,
+ GENERAL_REGS,
+ ALL_REGS,
+ LIM_REG_CLASSES
+};
+
+
+#define REG_CLASS_CONTENTS \
+{ { 0x00000000 }, /* Empty */ \
+ { 0x0000FFFF }, /* %0 to %15 */ \
+ { 0x0000FFFF } /* All registers */ \
+}
+
+#define N_REG_CLASSES LIM_REG_CLASSES
+
+#define REG_CLASS_NAMES { \
+ "NO_REGS", \
+ "GENERAL_REGS", \
+ "ALL_REGS" }
+
+#define FIXED_REGISTERS { 1, 0, 0, 0, \
+ 0, 0, 0, 0, \
+ 0, 0, 0, 0, \
+ 0, 0, 0, 1 }
+
+#define CALL_USED_REGISTERS FIXED_REGISTERS
+
+/* A C expression that is nonzero if it is permissible to store a
+value of mode MODE in hard register number REGNO (or in several
+registers starting with that one). All gstore registers are
+equivalent, so we can set this to 1. */
+#define HARD_REGNO_MODE_OK(R,M) 1
+
+// A C expression whose value
+// is a register class containing
+// hard register REGNO.
+#define REGNO_REG_CLASS(R) GENERAL_REGS
+
+// A C expression for the number
+// of consecutive hard registers,
+// starting at register number REGNO,
+// required to hold a value
+// of mode MODE.
+#define HARD_REGNO_NREGS(REGNO, MODE) \
+ ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) \
+ / UNITS_PER_WORD)
+
+// A C expression that is nonzero
+// if a value of mode MODE1
+// is accessible in mode MODE2
+// without copying.
+#define MODES_TIEABLE_P(MODE1, MODE2) 1
+
+// The Overall Framework of an Assembler File.
+#define ASM_COMMENT_START "#"
+#define ASM_APP_ON ""
+#define ASM_APP_OFF ""
+
+#define FILE_ASM_OP "\t.file\n"
+
+// Switch to the text or data segment.
+#define TEXT_SECTION_ASM_OP "\t.text"
+#define DATA_SECTION_ASM_OP "\t.data"
+
+// Assembler Commands for Alignment.
+#define ASM_OUTPUT_ALIGN(STREAM,POWER) \
+ fprintf (STREAM, "\t.p2align\t%d\n", POWER);
+
+// A C compound statement to output to
+// stdio stream STREAM the assembler syntax
+// for an instruction operand X.
+#define PRINT_OPERAND(STREAM, X, CODE) negrocore_print_operand (STREAM, X, CODE)
+
+#define PRINT_OPERAND_ADDRESS(STREAM, X) negrocore_print_operand_address (STREAM, X)
+
+// Output and Generation of Labels.
+#define GLOBAL_ASM_OP "\t.global\t"
+
+// A C type for declaring a variable
+// that is used as the first argument of
+// `FUNCTION_ARG' and other related values.
+#define CUMULATIVE_ARGS unsigned int
+
+/* A C statement for initializing the variable CUM
+for the state at the beginning of the argument list.
+For negrocore, all arguments are passed on the stack. */
+#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) (CUM = 0)
+
+// A C expression that is nonzero
+// if REGNO is the number of
+// a hard register in which function
+// arguments are sometimes passed.
+#define FUNCTION_ARG_REGNO_P(r) 0
+
+/* If defined, the maximum amount of space required
+for outgoing arguments will be computed and placed
+into the variable `current_function_outgoing_args_size'.
+No space will be pushed onto the stack for each call;
+instead, the function prologue should increase
+the stack frame size by this amount. */
+#define ACCUMULATE_OUTGOING_ARGS 1
+
+// How Scalar Function Values Are Returned.
+
+// STACK AND CALLING.
+
+// Define this macro if pushing a word
+// onto the stack moves the stack pointer
+// to a smaller address.
+#define STACK_GROWS_DOWNWARD
+
+#define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
+
+// Offset from the frame pointer
+// to the first local variable slot
+// to be allocated.
+#define STARTING_FRAME_OFFSET 0
+
+// Offset of first parameter from
+// the argument pointer register value.
+#define FIRST_PARM_OFFSET(F) 0
+
+// Define this macro to nonzero value
+// if the addresses of local variable slots
+// are at negative offsets from the frame pointer.
+#define FRAME_GROWS_DOWNWARD 1
+
+// An alias for the machine mode for pointers.
+#define Pmode SImode
+
+// A C expression whose value is RTL
+// representing the location of the incoming
+// return address at the beginning of any function,
+// before the prologue.
+#define INCOMING_RETURN_ADDR_RTX \
+ gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, NEGROCORE_SP))
+
+// Storage Layout.
+#define BITS_BIG_ENDIAN 0
+#define BYTES_BIG_ENDIAN 0
+#define WORDS_BIG_ENDIAN 0
+
+// Alignment required for a function entry point, in bits.
+#define FUNCTION_BOUNDARY 16
+
+/* Define this macro as a C expression
+which is nonzero if accessing less than
+a word of memory (i.e. a `char' or a `short')
+is no faster than accessing a word of memory. */
+#define SLOW_BYTE_ACCESS 1
+
+/* Number of storage units in a word;
+normally the size of a general-purpose
+register, a power of two from 1 or 8. */
+#define UNITS_PER_WORD 4
+
+/* Define this macro to the minimum alignment
+enforced by hardware for the stack pointer
+on this machine. The definition is a C expression
+for the desired alignment (measured in bits). */
+#define STACK_BOUNDARY 32
+
+/* Normal alignment required for function parameters
+on the stack, in bits. All stack parameters receive
+at least this much alignment regardless of data type. */
+#define PARM_BOUNDARY 32
+
+// Alignment of field after `int : 0' in a structure.
+#define EMPTY_FIELD_BOUNDARY 32
+
+// No data type wants to be aligned rounder than this.
+#define BIGGEST_ALIGNMENT 32
+
+// The best alignment to use in cases where we have a choice.
+#define FASTEST_ALIGNMENT 32
+
+// Every structures size must be a multiple of 8 bits.
+#define STRUCTURE_SIZE_BOUNDARY 8
+
+/* Look at the fundamental type that
+is used for a bit-field and use that
+to impose alignment on the enclosing structure.
+struct s {int a:8}; should have same alignment
+as "int", not "char". */
+#define PCC_BITFIELD_TYPE_MATTERS 1
+
+// Largest integer machine mode for structures.
+// If undefined, the default is GET_MODE_SIZE(DImode).
+#define MAX_FIXED_MODE_SIZE GET_MODE_SIZE(Pmode)
+
+// Make strings word-aligned so strcpy from constants will be faster.
+#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
+ ((TREE_CODE (EXP) == STRING_CST \
+ && (ALIGN) < FASTEST_ALIGNMENT) \
+ ? FASTEST_ALIGNMENT : (ALIGN))
+
+// Make arrays of chars word-aligned for the same reasons.
+#define DATA_ALIGNMENT(TYPE, ALIGN) \
+ (TREE_CODE (TYPE) == ARRAY_TYPE \
+ && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
+ && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
+
+// Set this nonzero if move instructions
+// will actually fail to work
+// when given unaligned data.
+#define STRICT_ALIGNMENT 1
+
+// Generating Code for Profiling.
+#define FUNCTION_PROFILER(FILE,LABELNO) (abort (), 0)
+
+// Trampolines for Nested Functions.
+#define TRAMPOLINE_SIZE (4)
+
+// Alignment required for trampolines, in bits.
+#define TRAMPOLINE_ALIGNMENT 32
+
+// An alias for the machine mode
+// used for memory references
+// to functions being called,
+// in `call' RTL expressions.
+#define FUNCTION_MODE QImode
+
+// The register number of the stack pointer
+// register, which must also be a fixed register
+// according to `FIXED_REGISTERS'.
+#define STACK_POINTER_REGNUM NEGROCORE_SP
+
+// The register number of the frame
+// pointer register, which is used
+// to access automatic variables
+// in the stack frame.
+#define FRAME_POINTER_REGNUM NEGROCORE_SP
+
+// The register number of the arg pointer register,
+// which is used to access the function's argument list.
+#define ARG_POINTER_REGNUM NEGROCORE_SP
+
+// Register which has been marked
+// as fixed in FIXED_REGISTERS
+// and which is used with instructions
+// that need a temporary register.
+// ### The need for this register
+// ### will be removed when I figure
+// ### how to allocate the least used
+// ### hard-register when an instruction
+// ### need a temporary register.
+#define NEGROCORE_RTMP NEGROCORE_R15
+
+/* A macro whose definition is
+the name of the class to which
+a valid base register must belong.
+A base register is one used in
+an address which is the register
+value plus a displacement. */
+#define BASE_REG_CLASS GENERAL_REGS
+
+#define INDEX_REG_CLASS NO_REGS
+
+#define HARD_REGNO_OK_FOR_BASE_P(NUM) \
+ ((unsigned)(NUM) <= NEGROCORE_R15)
+
+// A C expression which is nonzero
+// if register number NUM is suitable
+// for use as a base register
+// in operand addresses.
+#ifdef REG_OK_STRICT
+#define REGNO_OK_FOR_BASE_P(NUM) \
+ (HARD_REGNO_OK_FOR_BASE_P(NUM) \
+ || HARD_REGNO_OK_FOR_BASE_P(reg_renumber[(NUM)]))
+#else
+#define REGNO_OK_FOR_BASE_P(NUM) \
+ ((NUM) >= FIRST_PSEUDO_REGISTER || HARD_REGNO_OK_FOR_BASE_P(NUM))
+#endif
+
+// A C expression which is nonzero
+// if register number NUM is suitable
+// for use as an index register
+// in operand addresses.
+#define REGNO_OK_FOR_INDEX_P(NUM) NEGROCORE_RTMP
+
+// The maximum number of bytes that
+// a single instruction can move
+// quickly between memory and registers
+// or between two memory locations.
+#define MOVE_MAX 4
+#define TRULY_NOOP_TRUNCATION(op,ip) 1
+
+// All load operations zero extend.
+#define LOAD_EXTEND_OP(MEM) ZERO_EXTEND
+
+// A number, the maximum number of registers
+// that can appear in a valid memory address.
+#define MAX_REGS_PER_ADDRESS 1
+
+#define TRULY_NOOP_TRUNCATION(op,ip) 1
+
+// An alias for a machine mode name.
+// This is the machine mode that
+// elements of a jump-table should have.
+#define CASE_VECTOR_MODE Pmode
+
+// A C compound statement with a conditional `goto LABEL;'
+// executed if X (an RTX) is a legitimate memory address
+// on the target machine for a memory operand of mode MODE.
+#define GO_IF_LEGITIMATE_ADDRESS(MODE,X,LABEL) \
+ do { \
+ if (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X))) \
+ goto LABEL; \
+ if (GET_CODE (X) == SYMBOL_REF \
+ || GET_CODE (X) == LABEL_REF \
+ || GET_CODE (X) == CONST) \
+ goto LABEL; \
+ } while (0)
+
+// Run-time Target Specification.
+#define TARGET_CPU_CPP_BUILTINS() \
+ { \
+ builtin_define_std ("negrocore"); \
+ builtin_define_std ("NEGROCORE"); \
+ }
+
+#define HAS_LONG_UNCOND_BRANCH true
+
+#endif /* GCC_NEGROCORE_H */
diff --git a/gcc/config/negrocore/negrocore.md b/gcc/config/negrocore/negrocore.md
new file mode 100644
index 0000000..126e40c
--- /dev/null
+++ b/gcc/config/negrocore/negrocore.md
@@ -0,0 +1,473 @@
+;; NegroCore Machine description.
+;; Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+;; GCC is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published
+;; by the Free Software Foundation; either version 3, or (at your
+;; option) any later version.
+
+;; GCC is distributed in the hope that it will be useful, but WITHOUT
+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+;; License for more details.
+
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING3. If not see
+;; <http://www.gnu.org/licenses/>.
+
+;; -------------------------------------------------------------------------
+;; Specific constraints, predicates and attributes
+;; -------------------------------------------------------------------------
+
+(include "constraints.md")
+(include "predicates.md")
+
+; Most instructions are two bytes long.
+(define_attr "length" "" (const_int 2))
+
+;; -------------------------------------------------------------------------
+;; nop instruction
+;; -------------------------------------------------------------------------
+
+(define_insn "nop"
+ [(const_int 0)]
+ ""
+ "inc8 %%0, 0")
+
+;; -------------------------------------------------------------------------
+;; Arithmetic instructions
+;; -------------------------------------------------------------------------
+
+(define_insn "addsi3"
+ [(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
+ (plus:SI
+ (match_operand:SI 1 "register_operand" "0,0,0,0")
+ (match_operand:SI 2 "negrocore_general_operand" "r,Imm8,Im16,Im32")))]
+ ""
+ "@
+ add %0, %2
+ inc8 %0, %2
+ inc16 %0, %2
+ inc32 %0, %2"
+ [(set_attr "length" "2,2,4,6")])
+
+(define_insn "subsi3"
+ [(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
+ (minus:SI
+ (match_operand:SI 1 "register_operand" "0,0,0,0")
+ (match_operand:SI 2 "negrocore_general_operand" "r,Imm8,Im16,Im32")))]
+ ""
+ "@
+ sub %0, %2
+ inc8 %0, -%2
+ inc16 %0, -%2
+ inc32 %0, -%2"
+ [(set_attr "length" "2,2,4,6")])
+
+(define_insn "mulsi3"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (mult:SI
+ (match_operand:SI 1 "register_operand" "0")
+ (match_operand:SI 2 "register_operand" "r")))]
+ ""
+ "mul %0, %2")
+
+(define_insn "divsi3"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (div:SI
+ (match_operand:SI 1 "register_operand" "0")
+ (match_operand:SI 2 "register_operand" "r")))]
+ ""
+ "div %0, %2")
+
+(define_insn "udivsi3"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (udiv:SI
+ (match_operand:SI 1 "register_operand" "0")
+ (match_operand:SI 2 "register_operand" "r")))]
+ ""
+ "divu %0, %2")
+
+(define_insn "modsi3"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (mod:SI
+ (match_operand:SI 1 "register_operand" "0")
+ (match_operand:SI 2 "register_operand" "r")))]
+ ""
+ "mod %0, %2")
+
+(define_insn "umodsi3"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (umod:SI
+ (match_operand:SI 1 "register_operand" "0")
+ (match_operand:SI 2 "register_operand" "r")))]
+ ""
+ "modu %0, %2")
+
+;; -------------------------------------------------------------------------
+;; Unary arithmetic instructions
+;; -------------------------------------------------------------------------
+
+(define_insn "one_cmplsi2"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (not:SI (match_operand:SI 1 "register_operand" "r")))]
+ ""
+ "not %0, %1")
+
+;; -------------------------------------------------------------------------
+;; Logical operators
+;; -------------------------------------------------------------------------
+
+(define_insn "andsi3"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (and:SI (match_operand:SI 1 "register_operand" "0")
+ (match_operand:SI 2 "register_operand" "r")))]
+ ""
+ "and %0, %2")
+
+(define_insn "xorsi3"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (xor:SI (match_operand:SI 1 "register_operand" "0")
+ (match_operand:SI 2 "register_operand" "r")))]
+ ""
+ "xor %0, %2")
+
+(define_insn "iorsi3"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (ior:SI (match_operand:SI 1 "register_operand" "0")
+ (match_operand:SI 2 "register_operand" "r")))]
+ ""
+ "or %0, %2")
+
+;; -------------------------------------------------------------------------
+;; Shifters
+;; -------------------------------------------------------------------------
+
+(define_insn "ashlsi3"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (ashift:SI (match_operand:SI 1 "register_operand" "0")
+ (match_operand:SI 2 "register_operand" "r")))]
+ ""
+ "sll %0, %2")
+
+(define_insn "ashrsi3"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (ashiftrt:SI (match_operand:SI 1 "register_operand" "0")
+ (match_operand:SI 2 "register_operand" "r")))]
+ ""
+ "sra %0, %2")
+
+(define_insn "lshrsi3"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (lshiftrt:SI (match_operand:SI 1 "register_operand" "0")
+ (match_operand:SI 2 "register_operand" "r")))]
+ ""
+ "srl %0, %2")
+
+;; -------------------------------------------------------------------------
+;; Move instructions
+;; -------------------------------------------------------------------------
+
+(define_expand "movqi"
+ [(set (match_operand:QI 0 "general_operand" "")
+ (match_operand:QI 1 "general_operand" ""))]
+ ""
+ {
+ if (!(reload_in_progress || reload_completed)) {
+ ;// If this is a store, force the value into a register.
+ if (MEM_P (operands[0])) operands[1] = force_reg (QImode, operands[1]);
+ }
+ })
+
+(define_insn "*movqi"
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,W,r")
+ (match_operand:QI 1 "negrocore_general_operand" "O,r,Imm8,r,W"))]
+ ""
+ "@
+ xor %0, %0
+ cpy %0, %1
+ li8 %0, %1
+ st8 %1, %0
+ ld8 %0, %1"
+ [(set_attr "length" "2,2,2,2,2")])
+
+(define_expand "movhi"
+ [(set (match_operand:HI 0 "general_operand" "")
+ (match_operand:HI 1 "general_operand" ""))]
+ ""
+ {
+ if (!(reload_in_progress || reload_completed)) {
+ ;// If this is a store, force the value into a register.
+ if (MEM_P (operands[0])) operands[1] = force_reg (HImode, operands[1]);
+ }
+ })
+
+(define_insn "*movhi"
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r,r,W,r")
+ (match_operand:HI 1 "negrocore_general_operand" "O,r,Imm8,Im16,r,W"))]
+ ""
+ "@
+ xor %0, %0
+ cpy %0, %1
+ li8 %0, %1
+ li16 %0, %1
+ st16 %1, %0
+ ld16 %0, %1"
+ [(set_attr "length" "2,2,2,4,2,2")])
+
+(define_expand "movsi"
+ [(set (match_operand:SI 0 "general_operand" "")
+ (match_operand:SI 1 "general_operand" ""))]
+ ""
+ {
+ if (!(reload_in_progress || reload_completed)) {
+ ;// If this is a store, force the value into a register.
+ if (MEM_P (operands[0])) {
+ operands[1] = force_reg (SImode, operands[1]);
+ if (MEM_P (XEXP (operands[0], 0)))
+ operands[0] = gen_rtx_MEM (SImode, force_reg (SImode, XEXP (operands[0], 0)));
+ } else if (MEM_P (operands[1]) && MEM_P (XEXP (operands[1], 0)))
+ operands[1] = gen_rtx_MEM (SImode, force_reg (SImode, XEXP (operands[1], 0)));
+ }
+ })
+
+(define_insn "*movsi"
+ [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,W,r")
+ (match_operand:SI 1 "negrocore_general_operand" "O,r,Imm8,Im16,Im32,r,W"))]
+ ""
+ "@
+ xor %0, %0
+ cpy %0, %1
+ li8 %0, %1
+ li16 %0, %1
+ li32 %0, %1
+ st32 %1, %0
+ ld32 %0, %1"
+ [(set_attr "length" "2,2,2,4,6,2,2")])
+
+(define_insn "*movsi"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (label_ref (match_operand 1 "" "")))]
+ ""
+ {
+ if (get_attr_length (insn) == 4)
+ return "gip %0\n\tinc8 %0, %%l1+2";
+ else if (get_attr_length (insn) == 6)
+ return "gip %0\n\tinc16 %0, %%l1+4";
+ else return "gip %0\n\tinc32 %0, %%l1+6";
+ }
+ [(set (attr "length")
+ (cond [(leu (abs (minus (match_dup 1) (pc))) (const_int 125)) (const_int 4)
+ (leu (abs (minus (match_dup 1) (pc))) (const_int 32763)) (const_int 6)] (const_int 8)))])
+
+(define_insn "*movsi"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (match_operand:SI 1 "negrocore_symbol_ref_operand" "S"))]
+ ""
+ "gip %0\n\tinc32 %0, %1+6"
+ [(set_attr "length" "8")])
+
+;; -------------------------------------------------------------------------
+;; Bit extend instructions
+;; -------------------------------------------------------------------------
+
+(define_insn "*zero_extendqisi2"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (zero_extend:SI (match_operand:QI 1 "register_operand" "0")))]
+ ""
+ "zxt %0, 8")
+
+(define_insn "*zero_extendhisi2"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (zero_extend:SI (match_operand:HI 1 "register_operand" "0")))]
+ ""
+ "zxt %0, 16")
+
+(define_insn "*sign_extendqisi2"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (sign_extend:SI (match_operand:QI 1 "register_operand" "0")))]
+ ""
+ "sxt %0, 8")
+
+(define_insn "*sign_extendhisi2"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (sign_extend:SI (match_operand:HI 1 "register_operand" "0")))]
+ ""
+ "sxt %0, 16")
+
+;; -------------------------------------------------------------------------
+;; Conditional set instructions
+;; -------------------------------------------------------------------------
+
+(define_code_iterator COND [ne eq lt le ltu leu gt ge gtu geu])
+(define_code_attr CC [(ne "ne") (eq "eq")
+ (lt "lt") (le "lte") (ltu "ltu") (leu "lteu")
+ (gt "gt") (ge "gte") (gtu "gtu") (geu "gteu")])
+
+(define_insn "*setif<CC>"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (COND:SI (match_operand:SI 1 "register_operand" "0")
+ (match_operand:SI 2 "register_operand" "r")))]
+ ""
+ "s<CC> %0, %2")
+
+;; -------------------------------------------------------------------------
+;; Conditional jump instructions
+;; -------------------------------------------------------------------------
+
+(define_insn "cbranchsi4"
+ [(set (pc)
+ (if_then_else (match_operator 0 "negrocore_cmp_op"
+ [(match_operand:SI 1 "register_operand" "+r")
+ (match_operand:SI 2 "register_operand" "r")])
+ (label_ref (match_operand 3 "" ""))
+ (pc)))]
+ ""
+ {
+ char* s;
+
+ if (GET_CODE (operands[0]) == NE) s = "sne %1, %2\n\t";
+ else if (GET_CODE (operands[0]) == EQ) s = "seq %1, %2\n\t";
+ else if (GET_CODE (operands[0]) == LT) s = "slt %1, %2\n\t";
+ else if (GET_CODE (operands[0]) == LE) s = "slte %1, %2\n\t";
+ else if (GET_CODE (operands[0]) == LTU) s = "sltu %1, %2\n\t";
+ else if (GET_CODE (operands[0]) == LEU) s = "slteu %1, %2\n\t";
+ else if (GET_CODE (operands[0]) == GT) s = "sgt %1, %2\n\t";
+ else if (GET_CODE (operands[0]) == GE) s = "sgte %1, %2\n\t";
+ else if (GET_CODE (operands[0]) == GTU) s = "sgtu %1, %2\n\t";
+ else if (GET_CODE (operands[0]) == GEU) s = "sgteu %1, %2\n\t";
+ else abort();
+
+ static char str[200];
+
+ if (get_attr_length (insn) == 8)
+ sprintf (str, "%sgip %%%%%u\n\tinc8 %%%%%u, %%l3+4\n\tjnz %%1, %%%%%u",
+ s, NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP);
+ else if (get_attr_length (insn) == 10)
+ sprintf (str, "%sgip %%%%%u\n\tinc16 %%%%%u, %%l3+6\n\tjnz %%1, %%%%%u",
+ s, NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP);
+ else sprintf (str, "%sgip %%%%%u\n\tinc32 %%%%%u, %%l3+8\n\tjnz %%1, %%%%%u",
+ s, NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP);
+
+ return str;
+ }
+ [(set (attr "length")
+ (cond [(leu (abs (minus (match_dup 3) (pc))) (const_int 123)) (const_int 8)
+ (leu (abs (minus (match_dup 3) (pc))) (const_int 32761)) (const_int 10)] (const_int 12)))])
+
+;; -------------------------------------------------------------------------
+;; Unconditional jump instructions
+;; -------------------------------------------------------------------------
+
+(define_expand "call"
+ [(call (match_operand:QI 0 "memory_operand" "")
+ (match_operand 1 "general_operand" ""))]
+ "")
+
+(define_insn "*call"
+ [(call (mem:QI (match_operand:SI 0 "negrocore_symbol_ref_operand" "S"))
+ (match_operand 1 "" ""))]
+ ""
+ {
+ static char str[200];
+
+ sprintf (str, "gip %%%%%u\n\tinc8 %%%%%u, 14\n\tinc8 %%%%0, -4\n\tst32 %%%%%u, %%%%0\n\tinc32 %%%%%u, %%0\n\tj %%%%%u, %%%%%u",
+ NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP);
+
+ return str;
+ }
+ [(set_attr "length" "10")])
+
+(define_insn "*call"
+ [(call (mem:QI (match_operand:SI 0 "register_operand" "r"))
+ (match_operand 1 "" ""))]
+ ""
+ {
+ static char str[200];
+
+ sprintf (str, "gip %%%%%u\n\tinc8 %%%%%u, 8\n\tinc8 %%%%0, -4\n\tst32 %%%%%u, %%%%0\n\tj %%%%%u, %%0",
+ NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP);
+
+ return str;
+ }
+ [(set_attr "length" "10")])
+
+(define_expand "call_value"
+ [(set (match_operand 0 "" "")
+ (call (match_operand:QI 1 "memory_operand" "")
+ (match_operand 2 "" "")))]
+ "")
+
+(define_insn "*call_value_indirect"
+ [(set (match_operand 0 "register_operand" "=r")
+ (call (mem:QI (match_operand:SI 1 "register_operand" "r"))
+ (match_operand 2 "" "")))]
+ ""
+ {
+ static char str[200];
+
+ sprintf (str, "gip %%%%%u\n\tinc8 %%%%%u, 8\n\tinc8 %%%%0, -4\n\tst32 %%%%%u, %%%%0\n\tj %%%%%u, %%1",
+ NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP);
+
+ return str;
+ }
+ [(set_attr "length" "10")])
+
+(define_insn "indirect_jump"
+ [(set (pc) (match_operand:SI 0 "register_operand" "r"))]
+ ""
+ "j %15, %0")
+
+(define_insn "jump"
+ [(set (pc) (label_ref (match_operand 0 "" "")))]
+ ""
+ {
+ static char str[200];
+
+ if (get_attr_length (insn) == 6)
+ sprintf (str, "gip %%%%%u\n\tinc8 %%%%%u, %%l0+4\n\tj %%%%%u, %%%%%u",
+ NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP);
+ else if (get_attr_length (insn) == 8)
+ sprintf (str, "gip %%%%%u\n\tinc16 %%%%%u, %%l0+6\n\tj %%%%%u, %%%%%u",
+ NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP);
+ else sprintf (str, "gip %%%%%u\n\tinc32 %%%%%u, %%l0+8\n\tj %%%%%u, %%%%%u",
+ NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP);
+
+ return str;
+ }
+ [(set (attr "length")
+ (cond [(leu (abs (minus (match_dup 0) (pc))) (const_int 123)) (const_int 6)
+ (leu (abs (minus (match_dup 0) (pc))) (const_int 32761)) (const_int 8)] (const_int 10)))])
+
+;; -------------------------------------------------------------------------
+;; Prologue & Epilogue
+;; -------------------------------------------------------------------------
+
+(define_expand "prologue"
+ [(const_int 0)]
+ ""
+ {
+ negrocore_expand_prologue ();
+ DONE;
+ })
+
+(define_expand "epilogue"
+ [(return)]
+ ""
+ {
+ negrocore_expand_epilogue ();
+ DONE;
+ })
+
+(define_insn "returner"
+ [(return)]
+ "reload_completed"
+ {
+ static char str[200];
+
+ sprintf (str, "ld32 %%%%%u, %%%%0\n\tinc8 %%%%0, 4\n\tj %%%%%u, %%%%%u",
+ NEGROCORE_RTMP, NEGROCORE_RTMP, NEGROCORE_RTMP);
+
+ return str;
+ }
+ [(set_attr "length" "6")])
diff --git a/gcc/config/negrocore/negrocore.opt b/gcc/config/negrocore/negrocore.opt
new file mode 100644
index 0000000..3a8db3b
--- /dev/null
+++ b/gcc/config/negrocore/negrocore.opt
@@ -0,0 +1,21 @@
+; Negrocore compiler port options.
+
+; Copyright (C) 2015 Free Software Foundation, Inc.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 3, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING3. If not see
+; <http://www.gnu.org/licenses/>.
+
+; Ignored by the compiler
+mno-crt0
+Target RejectNegative
diff --git a/gcc/config/negrocore/predicates.md b/gcc/config/negrocore/predicates.md
new file mode 100644
index 0000000..53afddf
--- /dev/null
+++ b/gcc/config/negrocore/predicates.md
@@ -0,0 +1,29 @@
+;; NegroCore predicate definitions.
+;; Copyright (C) 2015 Free Software Foundation, Inc.
+
+;; GCC is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published
+;; by the Free Software Foundation; either version 3, or (at your
+;; option) any later version.
+
+;; GCC is distributed in the hope that it will be useful, but WITHOUT
+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+;; License for more details.
+
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING3. If not see
+;; <http://www.gnu.org/licenses/>.
+
+;; -------------------------------------------------------------------------
+;; Predicates
+;; -------------------------------------------------------------------------
+
+(define_predicate "negrocore_general_operand"
+ (match_code "mem,const_int,reg,subreg,const"))
+
+(define_predicate "negrocore_symbol_ref_operand"
+ (match_code "symbol_ref"))
+
+(define_predicate "negrocore_cmp_op"
+ (match_code "ne,eq,lt,le,ltu,leu,gt,ge,gtu,geu"))
diff --git a/gcc/config/negrocore/t-negrocore b/gcc/config/negrocore/t-negrocore
new file mode 100644
index 0000000..a9344ee
--- /dev/null
+++ b/gcc/config/negrocore/t-negrocore
@@ -0,0 +1,16 @@
+# NegroCore Target Makefile Fragment.
+# Copyright (C) 2015 Free Software Foundation, Inc.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published
+# by the Free Software Foundation; either version 3, or (at your
+# option) any later version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+# License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
diff --git a/libgcc/config.host b/libgcc/config.host
index f4a7428..0f09a87 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -1,5 +1,5 @@
# libgcc host-specific configuration file.
-# Copyright (C) 1997-2014 Free Software Foundation, Inc.
+# Copyright (C) 1997-2013 Free Software Foundation, Inc.
#This file is part of GCC.
@@ -91,9 +91,6 @@ alpha*-*-*)
am33_2.0-*-linux*)
cpu_type=mn10300
;;
-arc*-*-*)
- cpu_type=arc
- ;;
arm*-*-*)
cpu_type=arm
;;
@@ -105,9 +102,6 @@ bfin*-*)
;;
cr16-*-*)
;;
-crisv32-*-*)
- cpu_type=cris
- ;;
fido-*-*)
cpu_type=m68k
;;
@@ -140,27 +134,11 @@ microblaze*-*-*)
cpu_type=microblaze
;;
mips*-*-*)
- # All MIPS targets provide a full set of FP routines.
cpu_type=mips
- tmake_file="mips/t-mips"
- if test "${libgcc_cv_mips_hard_float}" = yes; then
- tmake_file="${tmake_file} t-hardfp-sfdf t-hardfp"
- else
- tmake_file="${tmake_file} t-softfp-sfdf"
- fi
- if test "${ac_cv_sizeof_long_double}" = 16; then
- tmake_file="${tmake_file} mips/t-softfp-tf"
- fi
- if test "${host_address}" = 64; then
- tmake_file="${tmake_file} mips/t-mips64"
- fi
- tmake_file="${tmake_file} t-softfp"
- ;;
-nds32*-*)
- cpu_type=nds32
+ tmake_file=mips/t-mips
;;
-nios2*-*-*)
- cpu_type=nios2
+negrocore*)
+ cpu_type=negrocore
;;
powerpc*-*-*)
cpu_type=rs6000
@@ -186,12 +164,6 @@ s390*-*-*)
sh[123456789lbe]*-*-*)
cpu_type=sh
;;
-tilegx*-*-*)
- cpu_type=tilegx
- ;;
-tilepro*-*-*)
- cpu_type=tilepro
- ;;
v850*-*-*)
cpu_type=v850
;;
@@ -229,9 +201,6 @@ case ${host} in
*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-knetbsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu)
tmake_file="$tmake_file t-crtstuff-pic t-libgcc-pic t-eh-dw2-dip t-slibgcc t-slibgcc-gld t-slibgcc-elf-ver t-linux"
extra_parts="crtbegin.o crtbeginS.o crtbeginT.o crtend.o crtendS.o"
- if test x$enable_vtable_verify = xyes; then
- extra_parts="$extra_parts vtv_start.o vtv_end.o vtv_start_preinit.o vtv_end_preinit.o"
- fi
;;
*-*-lynxos*)
tmake_file="$tmake_file t-lynx $cpu_type/t-crtstuff t-crtstuff-pic t-libgcc-pic"
@@ -349,16 +318,8 @@ alpha*-dec-*vms*)
extra_parts="$extra_parts vms-dwarf2.o vms-dwarf2eh.o"
md_unwind_header=alpha/vms-unwind.h
;;
-arc*-*-elf*)
- tmake_file="arc/t-arc-newlib arc/t-arc"
- extra_parts="crti.o crtn.o crtend.o crtbegin.o crtendS.o crtbeginS.o libgmon.a crtg.o crtgend.o"
- ;;
-arc*-*-linux-uclibc*)
- tmake_file="${tmake_file} t-slibgcc-libgcc t-slibgcc-nolc-override arc/t-arc700-uClibc arc/t-arc"
- extra_parts="crti.o crtn.o crtend.o crtbegin.o crtendS.o crtbeginS.o libgmon.a crtg.o crtgend.o"
- ;;
arm-wrs-vxworks)
- tmake_file="$tmake_file arm/t-arm arm/t-elf t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
+ tmake_file="$tmake_file arm/t-arm arm/t-vxworks t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
extra_parts="$extra_parts crti.o crtn.o"
;;
arm*-*-netbsdelf*)
@@ -439,13 +400,13 @@ cr16-*-elf)
extra_parts="$extra_parts crti.o crtn.o crtlibid.o"
;;
crisv32-*-elf)
- tmake_file="$tmake_file cris/t-cris t-softfp-sfdf t-softfp"
+ tmake_file="$tmake_file cris/t-cris t-fdpbit"
;;
cris-*-elf)
- tmake_file="$tmake_file cris/t-cris t-softfp-sfdf t-softfp cris/t-elfmulti"
+ tmake_file="$tmake_file cris/t-cris t-fdpbit cris/t-elfmulti"
;;
cris-*-linux* | crisv32-*-linux*)
- tmake_file="$tmake_file cris/t-cris t-softfp-sfdf t-softfp cris/t-linux"
+ tmake_file="$tmake_file cris/t-cris t-fdpbit cris/t-linux"
;;
epiphany-*-elf*)
tmake_file="epiphany/t-epiphany t-fdpbit epiphany/t-custom-eqsf"
@@ -477,7 +438,6 @@ h8300-*-elf*)
;;
hppa*64*-*-linux*)
tmake_file="$tmake_file pa/t-linux pa/t-linux64"
- extra_parts="crtbegin.o crtbeginS.o crtbeginT.o crtend.o crtendS.o"
;;
hppa*-*-linux*)
tmake_file="$tmake_file pa/t-linux t-slibgcc-libgcc"
@@ -487,7 +447,6 @@ hppa*-*-linux*)
else
tmake_file="$tmake_file pa/t-slibgcc-dwarf-ver"
fi
- extra_parts="crtbegin.o crtbeginS.o crtbeginT.o crtend.o crtendS.o"
md_unwind_header=pa/linux-unwind.h
;;
hppa[12]*-*-hpux10*)
@@ -589,7 +548,7 @@ i[34567]86-*-nto-qnx*)
extra_parts=crtbegin.o
;;
i[34567]86-*-rtems*)
- tmake_file="$tmake_file i386/t-crtstuff t-softfp-sfdf t-softfp"
+ tmake_file="$tmake_file i386/t-softfp i386/t-crtstuff"
extra_parts="$extra_parts crti.o crtn.o"
;;
i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*)
@@ -615,23 +574,6 @@ i[34567]86-*-cygwin*)
fi
tmake_file="${tmake_file} ${tmake_eh_file} ${tmake_dlldir_file} i386/t-slibgcc-cygming i386/t-cygming i386/t-cygwin i386/t-crtfm i386/t-chkstk t-dfprules"
;;
-x86_64-*-cygwin*)
- extra_parts="crtbegin.o crtend.o crtfastmath.o"
- # This has to match the logic for DWARF2_UNWIND_INFO in gcc/config/i386/cygming.h
- if test x$enable_sjlj_exceptions = xyes; then
- tmake_eh_file="i386/t-sjlj-eh"
- else
- tmake_eh_file="i386/t-seh-eh"
- fi
- # Shared libgcc DLL install dir depends on cross/native build.
- if test x${build} = x${host} ; then
- tmake_dlldir_file="i386/t-dlldir"
- else
- tmake_dlldir_file="i386/t-dlldir-x"
- fi
- # FIXME - dj - t-chkstk used to be in here, need a 64-bit version of that
- tmake_file="${tmake_file} ${tmake_eh_file} ${tmake_dlldir_file} i386/t-slibgcc-cygming i386/t-cygming i386/t-cygwin i386/t-crtfm t-dfprules i386/t-chkstk"
- ;;
i[34567]86-*-mingw*)
extra_parts="crtbegin.o crtend.o crtfastmath.o"
case ${target_thread_file} in
@@ -787,17 +729,11 @@ mips*-*-netbsd*) # NetBSD/mips, either endian.
;;
mips*-*-linux*) # Linux MIPS, either endian.
extra_parts="$extra_parts crtfastmath.o"
- tmake_file="${tmake_file} t-crtfm"
- case ${host} in
- mips64r5900* | mipsr5900*)
- # The MIPS16 support code uses floating point
- # instructions that are not supported on r5900.
- ;;
- *)
- tmake_file="${tmake_file} mips/t-mips16 t-slibgcc-libgcc"
- ;;
- esac
+ tmake_file="${tmake_file} t-crtfm mips/t-mips16"
md_unwind_header=mips/linux-unwind.h
+ if test "${ac_cv_sizeof_long_double}" = 16; then
+ tmake_file="${tmake_file} mips/t-tpbit"
+ fi
;;
mips*-sde-elf*)
tmake_file="$tmake_file mips/t-crtstuff mips/t-mips16"
@@ -831,18 +767,10 @@ mips-*-elf* | mipsel-*-elf*)
tmake_file="$tmake_file mips/t-elf mips/t-crtstuff mips/t-mips16"
extra_parts="$extra_parts crti.o crtn.o"
;;
-mipsr5900-*-elf* | mipsr5900el-*-elf*)
- tmake_file="$tmake_file mips/t-elf mips/t-crtstuff"
- extra_parts="$extra_parts crti.o crtn.o"
- ;;
mips64-*-elf* | mips64el-*-elf*)
tmake_file="$tmake_file mips/t-elf mips/t-crtstuff mips/t-mips16"
extra_parts="$extra_parts crti.o crtn.o"
;;
-mips64r5900-*-elf* | mips64r5900el-*-elf*)
- tmake_file="$tmake_file mips/t-elf mips/t-crtstuff"
- extra_parts="$extra_parts crti.o crtn.o"
- ;;
mips64vr-*-elf* | mips64vrel-*-elf*)
tmake_file="$tmake_file mips/t-elf mips/t-vr mips/t-crtstuff"
extra_parts="$extra_parts crti.o crtn.o"
@@ -876,39 +804,8 @@ moxie-*-rtems*)
# Don't use default.
extra_parts=
;;
-msp430*-*-elf)
- tmake_file="$tm_file t-crtstuff t-fdpbit msp430/t-msp430"
- ;;
-nds32*-elf*)
- # Basic makefile fragment and extra_parts for crt stuff.
- # We also append c-isr library implementation.
- tmake_file="${tmake_file} nds32/t-nds32 nds32/t-nds32-isr"
- extra_parts="crtbegin1.o crtend1.o libnds32_isr.a"
- # Append library definition makefile fragment according to --with-nds32-lib=X setting.
- case "${with_nds32_lib}" in
- "" | newlib)
- # Append library definition makefile fragment t-nds32-newlib.
- # Append 'soft-fp' software floating point make rule fragment provided by gcc.
- tmake_file="${tmake_file} nds32/t-nds32-newlib t-softfp-sfdf t-softfp"
- ;;
- mculib)
- # Append library definition makefile fragment t-nds32-mculib.
- # The software floating point library is included in mculib.
- tmake_file="${tmake_file} nds32/t-nds32-mculib"
- ;;
- *)
- echo "Cannot accept --with-nds32-lib=$with_nds32_lib, available values are: newlib mculib" 1>&2
- exit 1
- ;;
- esac
- ;;
-nios2-*-linux*)
- tmake_file="$tmake_file nios2/t-nios2 nios2/t-linux t-libgcc-pic t-slibgcc-libgcc"
- extra_parts="$extra_parts crti.o crtn.o"
- md_unwind_header=nios2/linux-unwind.h
- ;;
-nios2-*-*)
- tmake_file="$tmake_file nios2/t-nios2 t-softfp-sfdf t-softfp-excl t-softfp"
+negrocore-*-elf)
+ tmake_file="negrocore/t-negrocore t-softfp-sfdf t-softfp-excl t-softfp"
extra_parts="$extra_parts crti.o crtn.o"
;;
pdp11-*-*)
@@ -960,7 +857,7 @@ powerpc-*-eabisim*)
extra_parts="$extra_parts crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o ecrti.o ecrtn.o ncrti.o ncrtn.o"
;;
powerpc-*-elf*)
- tmake_file="${tmake_file} rs6000/t-ppccomm rs6000/t-savresfgpr rs6000/t-crtstuff t-crtstuff-pic t-fdpbit"
+ tmake_file="${tmake_file} rs6000/t-ppccomm rs6000/t-crtstuff t-crtstuff-pic t-fdpbit"
extra_parts="$extra_parts crtbeginS.o crtendS.o crtbeginT.o ecrti.o ecrtn.o ncrti.o ncrtn.o"
;;
powerpc-*-eabialtivec*)
@@ -985,7 +882,7 @@ powerpc*-*-linux*)
md_unwind_header=rs6000/linux-unwind.h
;;
powerpc-wrs-vxworks|powerpc-wrs-vxworksae)
- tmake_file="$tmake_file rs6000/t-ppccomm rs6000/t-savresfgpr t-fdpbit"
+ tmake_file="$tmake_file rs6000/t-ppccomm t-fdpbit"
;;
powerpc-*-lynxos*)
tmake_file="$tmake_file rs6000/t-lynx t-fdpbit"
@@ -1028,9 +925,6 @@ s390-*-linux*)
;;
s390x-*-linux*)
tmake_file="${tmake_file} s390/t-crtstuff s390/t-linux"
- if test "${host_address}" = 32; then
- tmake_file="${tmake_file} s390/32/t-floattodi"
- fi
md_unwind_header=s390/linux-unwind.h
;;
s390x-ibm-tpf*)
@@ -1189,11 +1083,11 @@ tic6x-*-elf)
extra_parts="$extra_parts crtbeginS.o crtendS.o crti.o crtn.o"
unwind_header=config/c6x/unwind-c6x.h
;;
-tilegx*-*-linux*)
+tilegx-*-linux*)
tmake_file="${tmake_file} tilegx/t-crtstuff t-softfp-sfdf tilegx/t-softfp t-softfp tilegx/t-tilegx"
md_unwind_header=tilepro/linux-unwind.h
;;
-tilepro*-*-linux*)
+tilepro-*-linux*)
tmake_file="${tmake_file} tilepro/t-crtstuff t-softfp-sfdf t-softfp tilepro/t-tilepro"
md_unwind_header=tilepro/linux-unwind.h
;;
@@ -1260,8 +1154,7 @@ i[34567]86-*-darwin* | x86_64-*-darwin* | \
i[34567]86-*-linux* | x86_64-*-linux* | \
i[34567]86-*-gnu* | \
i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]* | \
- i[34567]86-*-cygwin* | x86_64-*-cygwin* | \
- i[34567]86-*-mingw* | x86_64-*-mingw* | \
+ i[34567]86-*-cygwin* | i[34567]86-*-mingw* | x86_64-*-mingw* | \
i[34567]86-*-freebsd* | x86_64-*-freebsd* | \
i[34567]86-*-openbsd* | x86_64-*-openbsd*)
tmake_file="${tmake_file} t-softfp-tf"
diff --git a/libgcc/config/negrocore/crti.S b/libgcc/config/negrocore/crti.S
new file mode 100644
index 0000000..f94cb31
--- /dev/null
+++ b/libgcc/config/negrocore/crti.S
@@ -0,0 +1,40 @@
+# NegroCore crti.S
+#
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+# <http://www.gnu.org/licenses/>.
+
+# This file just make a stack frame for the contents of the .fini and
+# .init sections. Users may put any desired instructions in those
+# sections.
+
+ .file "crti.S"
+
+ .section ".init"
+ .global _init
+ .type _init, @function
+ .p2align 1
+_init:
+
+ .section ".fini"
+ .global _fini
+ .type _fini,@function
+ .p2align 1
+_fini:
diff --git a/libgcc/config/negrocore/crtn.S b/libgcc/config/negrocore/crtn.S
new file mode 100644
index 0000000..889aeae
--- /dev/null
+++ b/libgcc/config/negrocore/crtn.S
@@ -0,0 +1,38 @@
+# NegroCore crtn.S
+#
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+# <http://www.gnu.org/licenses/>.
+
+# This file just makes sure that the .fini and .init sections do in
+# fact return. Users may put any desired instructions in those sections.
+# This file is the last thing linked into any executable.
+
+ .file "crtn.S"
+
+ .section ".init"
+ ld32 %1, %0
+ inc8 %0, 4
+ j %1, %1
+
+ .section ".fini"
+ ld32 %1, %0
+ inc8 %0, 4
+ j %1, %1
diff --git a/libgcc/config/negrocore/sfp-machine.h b/libgcc/config/negrocore/sfp-machine.h
new file mode 100644
index 0000000..080e323
--- /dev/null
+++ b/libgcc/config/negrocore/sfp-machine.h
@@ -0,0 +1,61 @@
+#define _FP_W_TYPE_SIZE 32
+#define _FP_W_TYPE unsigned long
+#define _FP_WS_TYPE signed long
+#define _FP_I_TYPE long
+
+/* The type of the result of a floating point comparison. This must
+ match `__libgcc_cmp_return__' in GCC for the target. */
+typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
+#define CMPtype __gcc_CMPtype
+
+#define _FP_MUL_MEAT_S(R,X,Y) \
+ _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y) \
+ _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y) \
+ _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1
+#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#define _FP_NANSIGN_S 0
+#define _FP_NANSIGN_D 0
+#define _FP_NANSIGN_Q 0
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+/* Someone please check this. */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
+ do { \
+ if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \
+ && !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \
+ { \
+ R##_s = Y##_s; \
+ _FP_FRAC_COPY_##wc(R,Y); \
+ } \
+ else \
+ { \
+ R##_s = X##_s; \
+ _FP_FRAC_COPY_##wc(R,X); \
+ } \
+ R##_c = FP_CLS_NAN; \
+ } while (0)
+
+/* Not checked. */
+#define _FP_TININESS_AFTER_ROUNDING 0
+
+#define __LITTLE_ENDIAN 1234
+#define __BIG_ENDIAN 4321
+
+# define __BYTE_ORDER __LITTLE_ENDIAN
+
+/* Define ALIASNAME as a strong alias for NAME. */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+ extern __typeof (name) aliasname __attribute__ ((alias (#name)));
+
