Am 03.05.2014 07:43, schrieb Mark Farnell:
Suppose if I write a C++ application that contains hints to offload
part of the code to the Intel Xeon phi (MIC), then what compile do I
pass to allow generation of code that offload the code to MIC? Also,
if I want to have a native MIC binary which the whole application runs
inside the MIC card, what compile flag should I use instead?
Finally, does gcc-4.9 support the same set of MIC-related keywords as
the Intel Cluster Studio compiler, including the offloading keyword,
and keywords that mark variables as shared between the CPU and MIC?
I use the Intel XeonPhi Softwarepackage and the included GCC version and
so on.
With this it is possible to compile more or less everything. If not, you
have to use the Intel Compiler, but the only Problem i have is, that i
am not able to compile code that use the new 512Bit instructions.
If you use GCC, you have to do a crosscopile. If don't know how to do
this, say it please, perhaps i can help you.
If you are able to use the Intelcompiler, you just have to use the -mmic
flag.
I think a look on this documents will help you also:
https://software.intel.com/en-us/articles/building-a-native-application-for-intel-xeon-phi-coprocessors
https://www.tacc.utexas.edu/documents/13601/900205/Cluster_2013_MIC_Native.pdf/671d6403-b974-4027-b3a6-c4a61a433f5c
As far i know gcc not jet support the intrinsics, but don't nail me down
on this
