On Sat, 31 Aug 2013 03:40:33 -0700 (PDT) daxignxing <daxingxing.yu@xxxxxxxxx> wrote: > My machine is Core2 microarchitecture and I try to compile some arithmetic > codes by using the SSE instruction set. I search on the web and official > manual, the answer is everything I need to do （in simplest way） to add the > flag: march=native, because my chip support SSE. But when I use "gcc > -march=native -Q --help=target -v" to check if the flag really works, the > results display on the screen is a little bit beyond expectation, like：-msse > [disabled]-msse2 [disabled]-msse2avx [disabled]-msse3 [disabled]-msse4 > [disabled]-msse4.1 [disabled]-msse4.2 [disabled]-msse4a > [disabled]-msse5-msseregparm [disabled]-mssse3 [disabled]I find all the SSE > (even MMX) is disabled. Can any body tell me why and how to solve it? Many > thanks！PS: I know,an alternative way to active the option is to add the > flags like -mmsse ...manually. But, I am just curiosity, why march=native > doesn't works in my system:core2,Ubuntu 12.04(64bit system), gcc 4.6.3 `gcc -march=native -Q --help=target -v` doesn't really work because --help outputs before the flags that -march=native will enable have been determined. Try something like `echo "" | gcc -march=native -v -E - 2>&1 | grep cc1` instead. $ echo "" | gcc -march=native -v -E - 2>&1 | grep cc1 /usr/libexec/gcc/x86_64-pc-linux-gnu/4.8.1/cc1 -E -quiet -v - -march=core-avx-i -mcx16 -msahf -mno-movbe -maes -mpclmul -mpopcnt -mno-abm -mno-lwp -mno-fma -mno-fma4 -mno-xop -mno-bmi -mno-bmi2 -mno-tbm -mavx -mno-avx2 -msse4.2 -msse4.1 -mno-lzcnt -mno-rtm -mno-hle -mrdrnd -mf16c -mfsgsbase -mno-rdseed -mno-prfchw -mno-adx -mfxsr -mxsave -mxsaveopt --param l1-cache-size=32 --param l1-cache-line-size=64 --param l2-cache-size=8192 -mtune=core-avx-i -- Ryan Hill psn: dirtyepic_sk gcc-porting/toolchain/wxwidgets @ gentoo.org 47C3 6D62 4864 0E49 8E9E 7F92 ED38 BD49 957A 8463
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