Hi there,
My actual target is arm-none-eabi. But for simplicity, let us assume
my target has double constant, constant pool and two register classes:
general purpose register and floating point register. In the
constraint of define_insn, the letter 'E' means double constant, the
letter 't' means fp register, the letter 'r' means general purpose
register and the letter 'm' means memory operand. And I have below
define_insn pattern:
(define_insn "*thumb2_movsf_vfp"
[(set (match_operand:SF 0 "nonimmediate_operand" "=t, r ")
(match_operand:SF 1 "general_operand" " ?r,mE"))]
Before reload, I have RTX:
(set (reg:SF 114)
(const_double:SF 1.10000002384185791015625e+0
[0x0.8ccccdp+1])) x1.c:11 664 {*thumb2_movsf_vfp})
Now because no valid constraints for this RTX, the reload has to do
something to adjust this insn. I want the double const to be reloaded
into general purpose register first and then the general purpose
register will be moved to final floating point register. I would like
to end up with below two RTXs:
(set (reg:SF r4) (const_double:SF 1.1xxx)) // correspond to "r"/"E" constraints.
(set (reg:SF 114) (reg:SF r4)) // correspond to
"=t"/"?r" constraints.
But current gcc always reload const_double into constant pool and then
the final floating point register is loaded by accessing the memory.
I am not sure the way I expected is correct. But if it is correct,
what should I do to let the double constant can be put into general
purpose register? And why the constant pool is chose by default?
Please help.
BR,
Terry
