Hi David,
Thanks for the reply.
On Thu, Aug 8, 2013 at 4:04 PM, David Brown <david@xxxxxxxxxxxxxxx> wrote:
> On 08/08/13 11:19, sravan megan wrote:
>> Hi All,
>>
>> I am new to GCC. I was working in an Embedded processor with
>> GCC-4.6.4 version.
>>
>> I need to add load/store reverse instructions to the MD file.
>
> Are you trying to modify gcc itself for your particular target, or are
> just wanting to use these instructions in your own code? I can't think
> why the compiler would need to generate endian-reversed accesses itself
> (I think it would be great if gcc supported a variable or type attribute
> specifying that the data should be accessed with reversed endianness,
> but that's not available at the moment).
>
I am trying to modify gcc itself so that it can generate the lwx/stx
instruction.
int store_rev(int *n)
{
return ((((*n) & 0xff000000) >> 24)
| (((*n) & 0x00ff0000) >> 8)
| (((*n) & 0x0000ff00) << 8)
| (((*n) & 0x000000ff) << 24));
}
for the above store_rev function I need to generate only single swx instruction.
I was successful in generating the swx instruction but instead of 3
registers compiler is generating one extra operand "0" swx r0,r2,0,r0
> Using the instruction directly from your code is pretty easy with inline
> assembler:
>
> static inline uint32_t LMX(uint32_t * Ra, uint32_t Rb) {
> uint32_t Rd;
> asm(" lmx %[Rd], %[Ra], %[Rb]" :
> [Rd] "=r" (Rd) :
> [Ra] "r" (Ra), [Rb] "r" (Rb) );
> return Rd;
> }
>
> That should give you optimal code.
>
> mvh.,
>
> David
>
>
>>
>> My instructions will look as below:
>>
>> LWX Rd,Ra,Rb
>>
>> operation: Addr := Ra + Rb
>> Rd := *Addr (loading data with the opposite endianness)
>>
>> SWX Rd,Ra,Rb
>>
>> operation: Addr := Ra + Rb
>> *Addr := Rd (storing data with the opposite endianness)
>>
>>
>>
>> To add the above instructions in to md file I tried below pattern in md file
>>
>> (define_insn "movsi_rev"
>> [(set (match_operand:SI 0 "nonimmediate_operand" "=d,m")
>> (bswap: SI (match_operand:SI 1 "move_src_operand" "m,d")))]
>> ""
>> "@
>> lwx\t%0,%1,%0
>> swx\t%0,%1,%0"
>> [(set_attr "type" "load,store")
>> (set_attr "mode" "SI")
>> (set_attr "length" "4,4")])
>>
>>
>> I wrote a small testcase which is generating swx instruction but
>> the operands are more due to which it is failing in assembler phase
>>
>> ex: instead of swx r0,r2,r0 it is generating swx r0,r2,0,r0
>>
>> can anyone please help me in removing the extra operand in the above
>> instruction.
>>
>> Thanks,
>> Sravan
>>
>
