Hello! I’m trying to assemble the .s file using “arm-none-eabi-gcc -x assembler-with-cpp”, with options: -c –g -Wa,-mcpu=cortex-m3,-mimplicit-it=always,-march=armv7-m. With these options, as far as I understand, I explicitly ask to accept conditional constructs in any state (ARM / thumb/ thumb-2), but when I try to assemble “ADDNE r3, r2, r0” in any variation, the result is “Error: Thumb does not support conditional execution”. Same operation doesn’t assemble inside IT block, example: “IT NE *new line here* ADD r3, r0”, the result: “Error: instruction not allowed in IT block -- `add r3,r0'” Also, I’m having troubles with TST instruction – the 32-bit variant doesn’t want to assemble either – “tst r1, #(any constant here)” result in “Error: unshifted register required -- `tst r1,#1” At the same time, UDIV/SDIV instructions assemble correctly, this fact tells me that assembler doesn’t confuse the core with, for example, arm7tdmi. What can be the reason of such behavior? Thank you.
