Hi,
We have implemented peephole for generation of tbit instruction
in CR16 port.
The TBIT instruction copies the bit located in register or memory
location src at the bit position specified by offset, to PSR.F flag.
=====================================================================
tbitb $3, 8(r1) - Copies bit in pos 3 to mem loc 8 (R1) to PSR.F flag
=====================================================================
One of the instances of peephole generated is as follows:-
====================
Earlier code
loadw _Fdi@l,r7
andw $16384,r7
bne0w r7,.L9
------------------->
------------------->
------------------->
movb r7, r2
bal (ra), _ClrFlags@c
Optimized code
tbitw $14,_Fdi@l
bfs .L9
------------------->
------------------->
------------------->
movb r7, r2 <======= Problem
bal (ra), _ClrFlags@c
====================
It can be noted that the value at Fdi(label ref) is copied into r7
register. The r7 register is modified and the branch depends on r7.
However, with tbit peepholes; r7 register is optimized away.
In an application, r7 register is being used as source in the
sequence after tbit instruction. The above snippet shows that
the r7 value is moved into r2. However, as the r2 value is optimized
away; wrong value is moved into r2 and hence application crashes.
The peep2_reg_dead_p, find_reg_note and other functions were tried
out without much use.
Please let us know if there are any functions that would let compiler
know about the register being used in later sequence and hence avoid
the peephole in such scenarios.
Thanks & Regards,
Naveen
