Ilya Lesokhin schrieb:
Hi,
The avr backend uses r0 as a temporary register for a couple of
complex instruction, and i would like to remove that usage.
As a start i wanted to remove it from the code to update the stack,
this code need a temporary register to save the flags before disabling
the interrupts so i tried to use secondary reload to get a temporary
register.
i defined the following in avr.c:
[Code]
static reg_class_t
avr_secondary_reload (bool in_p, rtx x, reg_class_t rclass,
enum machine_mode mode,
secondary_reload_info *sri)
{
if (in_p)
{
if (rclass == STACK_REG && register_operand (x, HImode))
{
if (!TARGET_NO_INTERRUPTS && !AVR_HAVE_8BIT_SP)
{
sri->icode = CODE_FOR_movhi_sp_r;
}
}
}
return NO_REGS;
}
#undef TARGET_SECONDARY_RELOAD
#define TARGET_SECONDARY_RELOAD avr_secondary_reload
[\Code]
and in avr.md:
[Code]
(define_insn "movhi_sp_r"
[(set (match_operand:HI 0 "stack_register_operand" "=q")
(match_operand:HI 1 "register_operand" "r"))
(clobber (match_operand:QI 2 "register_operand" "=&r"))]
"(stack_register_operand(operands[0], HImode) && register_operand
(operands[1], HImode))"
"in %2, __SREG__
cli
out __SP_H__, %B1
out,__SREG__, %2
out,__SP_L__, %A1"
[(set_attr "length" "5")
(set_attr "cc" "none")])
[\Code]
but for some reason when i use my changed compiler to compile code
that update the stack pointer i get the following error:
../testgcc.c:24:1: error: invalid insn:
(insn/f 27 26 28 (set (reg/f:HI 28 r28)
(reg/f:HI 32 __SP_L__)) ../testgcc.c:4 7 {*movhi_r_sp}
(expr_list:REG_UNUSED (reg:QI 29 r29)
(nil)))
which to me say's that the compiler didnt use my new pattern.
can anyone explain to me what's wrong with what i did?
Thank in advance,
Ilya.
The avr BE has more thon one movhi insn. It's discouraged to have more
than one move insn per mode. Remove the superfluous move insn and
ensure that the remaining mov insn handles that case.
