"Dmitry" <mittie@xxxxxxx> writes: > I'm currently writing a GCC back end for a custom architecture. And I > have a RTL related question. If I am, for example, writing an > implementation for "movhi" insn, and depending on a register class of > the destination operand it could include a condition code register > change. How can I write a right implementation for such case? If I use > "define_expand" RTX destination registers are not allocated yet so > they could be any pseudo registers. So I can not determine the class > of that registers during RTL generation phase. Should I use > "define_split" additionally to analyze operand's register class after > reload phase? Or maybe there's other way? I think you'll have to clobber the conditional code register in the initial insn, and use a define_split to remove the clobber (or perhaps change it to a set when appropriate) after register allocation is complete. Ian
