RE: Exception Handling implementation with Return Address (RA) having PC right shifted by 1

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Hi,
    Thanks for your valuable pointer. 
	After debugging the unwinder code, we found out that the problem arises
	because of optimization flags -fno-gcse and -fno-dse. After defining 
	LIBGCC2_UNWIND_ATTRIBUTE 	macro to 
	__attribute__((optimize("no-dse","-no-gcse"))) , things looks a bit better. 

    Comparing the object dumps with and without -fgcse 
    
Code snippet with -fno-gcse 
                push    $0x2,r0            
                loadd   0x50:l(r12),(r1,r0) 
                jal     (r1,r0)             
                addd    $0x8:s,(sp)   	
     
code snippet with -fgcse
                push    $0x2,r0            
                jal     (r11,r10)             
                addd    $0x8:s,(sp)
				
NOTE :  r12 is PIC register
        jal jumps to address specified in register pair (r1,r0)

With -fgcse optimizes PIC load instruction and jumps to address specified by
(r11,r10) register pair . But (r11,r10) has no pointer stored in it. This is 
the place where my kernel gets crashed because of corrupted JAL. 

How can I make sure my LOAD instruction won't get optimized away with -fgcse.

Thanks in advance,
Sumanth G

-----Original Message-----
From: Ian Lance Taylor [mailto:iant@xxxxxxxxxx] 
Sent: Tuesday, November 23, 2010 10:14 PM
To: Sumanth Gundapaneni
Cc: gcc-help@xxxxxxxxxxx
Subject: Re: Exception Handling implementation with Return Address (RA) having PC right shifted by 1

Sumanth Gundapaneni <Sumanth.Gundapaneni@xxxxxxxxxxxxxxx> writes:

>    The problem arises with throw and catch code in c++ EH code. During the runtime unwinding process of stack, RA register value which is a right shifted value of PC (because of hardware implementation) is interpreted by stack unwinder as is. So the call backs across functions were pointed to wrong locations. 

Hmmm, I see.

> How can I adjust the RA (return address) so that my throw, catch EH code works fine with my compiler.

To be clear, I don't think you want to adjust the RA.  I think you want
to adjust the DWARF encoding of the RA, so that the DWARF code knows
what to do with the value.  As I said earlier, the usual way to tell the
DWARF code to do something unusual is to build a REG_CFA_DEF_CFA note
and attach it to some relevant insn.  This is an unusual case which I've
never seen before, and I don't know exactly how to deal with it.  But I
think REG_CFA_DEF_CFA is the right area to look.

Ian





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