On 08/31/2010 04:38 PM, naveen yadav wrote: > We are looking at an issue related to failure of arm-gcc ( version > 4.4.1 ) in generating correct assembly from inlined-asm code. > > The generated assembly contains > > strex r3,r3,[r2] > > The corresponding iniline-asm is > " strex %2, %3, [%0];" > > > Its compilation fails as strex cannot have same register as first 2 operands. > > > > /tmp/ccnJX1l7.s: Assembler messages: > /tmp/ccnJX1l7.s:36: Error: registers may not be the same -- `strex r3,r3,[r2]' > > > > Operand %2 is specified as output and %3 is specified as input. > > Compilation does pass if we also specify %2 with the additional > constraint & .That is "=&r"(t) > > > > Is gcc not smart enough to recognise that strex cannot use same > register for both operands ? No. gcc just treats asm operands as strings. If you want the registers to be unique and not shared between inputs and output, you have to tell gcc that. You've discovered a good use for an earlyclobber, so use "&", that's what it is for. This is not a bug in gcc. Andrew.
