Dan Dickerman <dan09@xxxxxxxxxxxxxxxxxx> writes: > Can someone suggest where the nops are coming from and how I can > encourage gcc to re-order the loads/stores as is done for words to > streamline this code a bit? As a related note, is Shark making a valid > complaint about the stalls this code produces, or can I sleep > comfortably knowing that the cache will simply make all these memory > references into single-cycle instructions anyway? Good questions, but I don't know all the answers. The nop instructions are there because the gcc instruction scheduler is creating groups which are intended to be optimal for the instruction dispatcher. You should make sure that you are using a -mtune option that corresponds to the processor you are using, to make sure that gcc is doing something that is appropriate there. gcc has gotten steadily better support for the restrict qualifier, but it still doesn't work as well as it should. In gcc 4.2 it did very little. I have no idea whether Shark is correct or not. Ian
