noeljohn <noel.daniel@xxxxxxx> writes:
> Ian Lance Taylor-3 wrote:
>>
>> noeljohn <noel.daniel@xxxxxxx> writes:
>>
>>> I am working on a new risc machine. I have defined the
>>> "store_multiple" and "load_multiple" pattern and the system builds fine.
>>> But
>>> when I compile the C program for a declared integer array, the
>>> "store_multiple" and "load_multiple" patterns are not getting emitted.
>>> Instead simple load and store patterns are emitted multiple times. As per
>>> actual working store_multiple and load_multiple patters need to get
>>> emitted.
>>
>> What do your store_multiple and load_multiple insns look like?
>>
>> E.g., if they only work for consecutive registers, then gcc can only
>> match them after register allocation, but there is no appropriate
>> optimization pass to do so. In that case you are going to have write
>> peepholes for them, and you're going to have to generate them
>> explicitly in your backend's prologue and epilogue generation.
>>
>>
>> Ian
>>
>>
>
>
> Thank you for replying.
> According to my understanding, it works for consecutive registers as I am
> just declaring an array in my test case. To be specific, how do I get
> "rodata" section in assembly generated that contains only the data(integers)
> in the array declared,, because when I compile with other already build
> processors, it creates this rodata section and then using a single
> instruction stores all the elements of array in memory.
It's difficult to say how this works without more information. Is the
array being treated as a vector?
It's easy enough to get an rodata section in your assembly code, that
should happen more or less automatically if you write
const int ai[] = { 1, 2, 3, 4 };
I don't know how to load that using a load-multiple instruction unless
it is being treated as a vector.
Ian
