2009/1/29 Jamie Lokier <jamie@xxxxxxxxxxxxx>:
> loody wrote:
>> e1a0e00f mov lr, pc
>> e12fff13 bx r3
>
>> What is the specialty of the instruction, "mov lr,pc", which let
>> arm cpu fail?
>
> Both of those instructions can put the CPU into Thumb mode. If it
> doesn't support Thumb, you get an instruction fault.
>
> "mov lr,pc" is supported on all ARMs, but (guessing from what you're
> getting) maybe it can fault depending on the value in "lr"?
Hi:
I cannot understand the meaning of depending the value in "lr"?
Actually my cpu get exception when executing this instruction not bx r3.
But lr is the destination for cpu to write, I have checked the arm
reference and it doesn't say any cautions when the destination is lr.
>
> "bx" is not available on all ARMs, and will fault when you don't have
> it. That's why it's necessary to build everything with the right GCC
> options.
There are bx instructions generated when I use arm-linux-2006.
I list them below:
800096a0 <__kuser_helper_start>:
800096a0: e12fff1e bx lr
...
800096c0 <__kuser_cmpxchg>:
800096c0: e3e00000 mvn r0, #0 ; 0x0
800096c4: e2900000 adds r0, r0, #0 ; 0x0
800096c8: e12fff1e bx lr
...
800096e0 <__kuser_get_tls>:
800096e0: ee1d0f70 mrc 15, 0, r0, cr13, cr0, {3}
800096e4: e12fff1e bx lr
BTW, can I take off the Thumb support in my compiler options?
Thumb is only used for decreasing the density of source code and so
far I just want my kernel say hello to me.
appreciate your help,
miloody
